| Commit message (Expand) | Author | Age | Files | Lines |
* | Put Is64BitMemOperand into !defined(NDEBUG) for now. | Joerg Sonnenberger | 2012-03-21 | 1 | -0/+2 |
* | Use a signed value for this enum to avoid spuriuos warnings from gcc. | Benjamin Kramer | 2012-03-21 | 2 | -2/+2 |
* | Fix generation of the address size override prefix. Add assertions for | Joerg Sonnenberger | 2012-03-21 | 1 | -5/+51 |
* | Spacing fixes and using 'unsigned' instead of 'int' to index to select shuffl... | Craig Topper | 2012-03-21 | 1 | -28/+29 |
* | [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu to | Chad Rosier | 2012-03-20 | 1 | -0/+17 |
* | [avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to give | Chad Rosier | 2012-03-20 | 1 | -1/+1 |
* | Whitespace. | Chad Rosier | 2012-03-20 | 1 | -1/+1 |
* | [avx] Move the vextractf128 patterns closer to the vextractf128 def. Remove | Chad Rosier | 2012-03-20 | 1 | -28/+26 |
* | [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads. | Chad Rosier | 2012-03-20 | 1 | -3/+3 |
* | Remove code that prevented lowering shuffles if they are used by load and the... | Craig Topper | 2012-03-20 | 1 | -92/+111 |
* | Factor out target shuffle mask decoding from getShuffleScalarElt and use a Sm... | Craig Topper | 2012-03-20 | 4 | -96/+95 |
* | This patch adds X86 instruction itineraries for non-pseudo opcodes in | Preston Gurd | 2012-03-19 | 3 | -51/+82 |
* | Add a note for -ffast-math optimization of vector norm. | Benjamin Kramer | 2012-03-19 | 1 | -0/+19 |
* | isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask. | Craig Topper | 2012-03-18 | 1 | -0/+2 |
* | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper | 2012-03-17 | 14 | -20/+12 |
* | [avx] Add patterns for VINSERTF128rm. | Chad Rosier | 2012-03-15 | 1 | -0/+13 |
* | Change the X86 assembler to not require a segment register on string | Kevin Enderby | 2012-03-13 | 1 | -4/+5 |
* | Added a missing error check for X86 assembly with mismatched base and index | Kevin Enderby | 2012-03-12 | 1 | -0/+19 |
* | Convert more static tables of registers used by calling convention to uint16_... | Craig Topper | 2012-03-11 | 2 | -6/+6 |
* | *fix typo in comment; test of commit access | Kay Tiong Khoo | 2012-03-10 | 1 | -1/+1 |
* | C files in llvm still have to be C89 compliant, remove C++-style comments. | Benjamin Kramer | 2012-03-10 | 1 | -4/+6 |
* | Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax. | Bill Wendling | 2012-03-10 | 1 | -5/+5 |
* | Add the missing call to Error when a bad X86 scale expression is parsed. | Kevin Enderby | 2012-03-09 | 1 | -1/+3 |
* | Fix the x86 disassembler to at least print the lock prefix if it is the first | Kevin Enderby | 2012-03-09 | 1 | -0/+7 |
* | Use uint16_t to store opcodes in static tables in X86 backend. | Craig Topper | 2012-03-09 | 3 | -24/+30 |
* | Fix a regression from r147481. | Chad Rosier | 2012-03-09 | 2 | -1/+8 |
* | Fix the operand ordering on aliases for shld and shrd. PR12173, part 2. | Eli Friedman | 2012-03-06 | 1 | -13/+13 |
* | Make MCRegisterInfo available to the the MCInstPrinter. | Jim Grosbach | 2012-03-05 | 4 | -10/+8 |
* | Address Evan's comments for r151877. | Chad Rosier | 2012-03-05 | 1 | -7/+6 |
* | Make aliases for shld and shrd match gas. PR12173. | Eli Friedman | 2012-03-05 | 1 | -14/+14 |
* | Use uint16_t to store register overlaps to reduce static data. | Craig Topper | 2012-03-04 | 2 | -8/+8 |
* | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper | 2012-03-04 | 2 | -2/+2 |
* | Use uint8_t instead of enums to store values in X86 disassembler table. Shave... | Craig Topper | 2012-03-04 | 2 | -4/+4 |
* | Prevent obscure and incorrect tail-call optimization. | Chad Rosier | 2012-03-02 | 1 | -0/+5 |
* | Minimal changes for LLVM to compile under VS11. | Michael J. Spencer | 2012-03-01 | 1 | -0/+4 |
* | Added annotations for x86 pc relative loads to llvm's 'C' disassembler. | Kevin Enderby | 2012-02-29 | 1 | -0/+24 |
* | Intel Atom instruction itineraries for mov sign extension and mov zero extens... | Andrew Trick | 2012-02-29 | 3 | -32/+68 |
* | Make MemoryObject accessor members const again | Derek Schuff | 2012-02-29 | 2 | -2/+2 |
* | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 3 | -4/+5 |
* | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 3 | -5/+4 |
* | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 3 | -4/+5 |
* | This patch adds instruction latencies for the SSE instructions | Preston Gurd | 2012-02-27 | 3 | -728/+1697 |
* | Add q suffix aliases for the fistp and fisttp mnemonics. | Chad Rosier | 2012-02-27 | 1 | -0/+2 |
* | X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by ... | Craig Topper | 2012-02-27 | 3 | -3/+9 |
* | Target/X86: Fix assertion failures and warnings caused by r151382 _ftol2 lowe... | NAKAMURA Takumi | 2012-02-25 | 3 | -12/+20 |
* | Add WIN_FTOL_* psudo-instructions to model the unique calling convention | Michael J. Spencer | 2012-02-24 | 5 | -32/+131 |
* | Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove du... | Pete Cooper | 2012-02-24 | 1 | -9/+0 |
* | Updated the llvm-mc disassembler C API to support for the X86 target. | Kevin Enderby | 2012-02-23 | 6 | -30/+205 |
* | Properly emit _fltused with FastISel. Refactor to share code with SDAG. | Michael J. Spencer | 2012-02-22 | 1 | -1/+1 |
* | Remove extra semi-colons. | Chad Rosier | 2012-02-22 | 1 | -1/+1 |