| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. | Evan Cheng | 2011-07-01 | 5 | -5/+5 |
| * | Add MCSubtargetInfo target registry stuff. | Evan Cheng | 2011-07-01 | 1 | -0/+28 |
| * | Calling-convention specifications for illegal types are no-ops. Simplify bas... | Eli Friedman | 2011-07-01 | 1 | -30/+11 |
| * | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng | 2011-07-01 | 2 | -3/+3 |
| * | - Added MCSubtargetInfo to capture subtarget features and scheduling | Evan Cheng | 2011-07-01 | 2 | -3/+12 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 2 | -8/+11 |
| * | Use the correct registers on X86_64. | Bill Wendling | 2011-06-30 | 1 | -4/+4 |
| * | Fix a problem with fast-isel return values introduced in r134018. | Jakob Stoklund Olesen | 2011-06-30 | 1 | -2/+3 |
| * | Add target a target hook to get the register number used by the compact unwind | Bill Wendling | 2011-06-30 | 2 | -0/+19 |
| * | Tweak error messages to match GCC. Should fix gcc.target/i386/pr30848.c | Jakob Stoklund Olesen | 2011-06-30 | 1 | -3/+3 |
| * | Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to | Evan Cheng | 2011-06-30 | 4 | -13/+20 |
| * | Recognize the xstorerng alias for VIA PadLock's xstore instruction. | Joerg Sonnenberger | 2011-06-30 | 1 | -0/+2 |
| * | Fix a small thinko for constant i64 lock/orq optimization where we | Eric Christopher | 2011-06-30 | 1 | -2/+4 |
| * | Always adjust the stack pointer immediately after the call. | Jakob Stoklund Olesen | 2011-06-29 | 1 | -0/+7 |
| * | Use getRegForInlineAsmConstraint instead of custom defining regclasses | Eric Christopher | 2011-06-29 | 2 | -56/+24 |
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 3 | -14/+14 |
| * | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
| * | Add MCInstrInfo registeration machinery. | Evan Cheng | 2011-06-28 | 1 | -0/+6 |
| * | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 2011-06-28 | 9 | -16/+19 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 5 | -36/+36 |
| * | Clean up the handling of the x87 fp stack to make it more robust. | Jakob Stoklund Olesen | 2011-06-28 | 6 | -227/+362 |
| * | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng | 2011-06-27 | 1 | -6/+5 |
| * | Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc | Evan Cheng | 2011-06-27 | 8 | -13/+17 |
| * | Grow the X86FloatingPoint register map to hold 16 registers. | Jakob Stoklund Olesen | 2011-06-27 | 1 | -5/+15 |
| * | Replace dyn_cast<> with cast<> since the cast is already guarded by the neces... | Chad Rosier | 2011-06-25 | 1 | -1/+1 |
| * | Enable tail call optimization in the presence of a byval (x86-32 and x86-64). | Chad Rosier | 2011-06-25 | 1 | -0/+4 |
| * | Unbreak CMake build | Douglas Gregor | 2011-06-25 | 1 | -0/+2 |
| * | Add include guard. | Evan Cheng | 2011-06-24 | 1 | -0/+5 |
| * | Rename TargetDesc to MCTargetDesc | Evan Cheng | 2011-06-24 | 6 | -4/+3 |
| * | Refactor MachO relocation generaration into the Target directories. | Jim Grosbach | 2011-06-24 | 1 | -0/+522 |
| * | Hoist simple check above more complex checking to avoid unnecessary | Chad Rosier | 2011-06-24 | 1 | -5/+5 |
| * | - Add MCRegisterInfo registration machinery. Also added x86 registration rout... | Evan Cheng | 2011-06-24 | 2 | -0/+16 |
| * | Starting to refactor Target to separate out code that's needed to fully describe | Evan Cheng | 2011-06-24 | 7 | -13/+69 |
| * | Add support for movntil/movntiq mnemonics. Reported on llvmdev. | Eli Friedman | 2011-06-23 | 1 | -2/+2 |
| * | Rename TargetOptions::StackAlignment to StackAlignmentOverride. | Evan Cheng | 2011-06-23 | 1 | -1/+1 |
| * | Remove TargetOptions.h dependency from X86Subtarget. | Evan Cheng | 2011-06-23 | 6 | -42/+46 |
| * | Get rid of one getStackAlignment(). RegisterInfo shouldn't need to know about... | Evan Cheng | 2011-06-23 | 3 | -11/+8 |
| * | Add support for assembling "movq" when it's correct to do so, while continuing | Nick Lewycky | 2011-06-21 | 1 | -0/+16 |
| * | Revert r133452: "Emit movq for 64-bit register to XMM register moves..." | Bob Wilson | 2011-06-21 | 1 | -21/+6 |
| * | Emit movq for 64-bit register to XMM register moves, but continue to accept | Nick Lewycky | 2011-06-20 | 1 | -6/+21 |
| * | Remove unused but set variables. | Benjamin Kramer | 2011-06-18 | 1 | -3/+4 |
| * | Switch x86 to using AltOrders instead of MethodBodies. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -67/+6 |
| * | SI, DI, BP, and SP don't have 8-bit sub-registers in x86 mode. | Jakob Stoklund Olesen | 2011-06-17 | 1 | -2/+9 |
| * | Add a comment describing why transforming (shl x, 1) to (add x, x) is to be | Dan Gohman | 2011-06-16 | 1 | -0/+5 |
| * | Add AVX suport for fpextend. | Bruno Cardoso Lopes | 2011-06-16 | 1 | -0/+19 |
| * | Use set operations instead of plain lists to enumerate register classes. | Jakob Stoklund Olesen | 2011-06-15 | 1 | -60/+41 |
| * | Add a new function attribute, nonlazybind, which inhibits lazy-loading | John McCall | 2011-06-15 | 1 | -0/+20 |
| * | Add one more argument to the prefetch intrinsic to indicate whether it's a data | Bruno Cardoso Lopes | 2011-06-14 | 1 | -4/+4 |
| * | Fit banner in 80-col and adjust whitespace. No functionality changes. | Nick Lewycky | 2011-06-14 | 1 | -2/+2 |
| * | AnalyzeBranch doesn't change which successors a bb has, just the order | Rafael Espindola | 2011-06-12 | 1 | -1/+0 |
