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* Change ELF systems to use CFI for producing the EH tables. This reduces theRafael Espindola2011-04-142-2/+14
| | | | | | size of the clang binary in Debug builds from 690MB to 679MB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129518 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix whitespace and tabs.Michael J. Spencer2011-04-141-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129517 91177308-0d34-0410-b5e6-96231b3b80d8
* As Dan pointed out, movzbl, movsbl, and friends are nicer than their aliasBill Wendling2011-04-141-13/+13
| | | | | | | (movzx/movsx) because they give more information. Revert that part of the patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129498 91177308-0d34-0410-b5e6-96231b3b80d8
* Have the X86 back-end emit the alias instead of what's being aliased. In mostBill Wendling2011-04-142-11/+14
| | | | | | | cases, it's much nicer and more informative reading the alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option to not print the alias of an instruction. It defaults to "printBill Wendling2011-04-131-2/+4
| | | | | | | the alias". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129485 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r129401 with patch for clang.Bill Wendling2011-04-132-31/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129419 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r129401 for now. Clang is using the old way of doing things.Bill Wendling2011-04-122-0/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129403 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the unaligned load intrinsics in favor of using native unaligned loads.Bill Wendling2011-04-122-31/+0
| | | | | | | | | | Now that we have a first-class way to represent unaligned loads, the unaligned load intrinsics are superfluous. First part of <rdar://problem/8460511>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129401 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't include Operator.h from InstrTypes.h.Jay Foad2011-04-111-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-092-0/+19
| | | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace the old algorithm that emitted the "print the alias for an instruction"Bill Wendling2011-04-074-5/+22
| | | | | | | | | | | | | | with the newer, cleaner model. It uses the IAPrinter class to hold the information that is needed to match an instruction with its alias. This also takes into account the available features of the platform. There is one bit of ugliness. The way the logic determines if a pattern is unique is O(N**2), which is gross. But in reality, the number of items it's checking against isn't large. So while it's N**2, it shouldn't be a massive time sink. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129110 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another case we are not optimizing.Rafael Espindola2011-04-061-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129012 91177308-0d34-0410-b5e6-96231b3b80d8
* The original issue has been fixed by not doing unnecessary sign extensions.Rafael Espindola2011-04-061-14/+17
| | | | | | Change the test to force a sign extension and expose the problem again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129011 91177308-0d34-0410-b5e6-96231b3b80d8
* Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger2011-04-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128847 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-047-4/+81
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger2011-04-043-50/+51
| | | | | | | | | Define most shift masks incrementally to reduce the redundant hard-coding. Introduce new shift for the VEX flags to replace the magic constant 32 in various places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128822 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to create zero-sized stack objects.Evan Cheng2011-03-301-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128586 91177308-0d34-0410-b5e6-96231b3b80d8
* Make helper static.Benjamin Kramer2011-03-261-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128338 91177308-0d34-0410-b5e6-96231b3b80d8
* Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets.NAKAMURA Takumi2011-03-243-62/+106
| | | | | | FIXME: Some cleanups would be needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128206 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r128175.Andrew Trick2011-03-231-73/+4
| | | | | | | I'm backing this out for the second time. It was supposed to be fixed by r128164, but the mingw self-host must be defeating the fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128181 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply Eli's r127852 now that the pre-RA scheduler can spill EFLAGS.Andrew Trick2011-03-231-4/+73
| | | | | | | (target-specific branchless method for double-width relational comparisons on x86) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128175 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix fast-isel address mode folding to avoid folding instructionsDan Gohman2011-03-221-16/+22
| | | | | | | outside of the current basic block. This fixes PR9500, rdar://9156159. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128041 91177308-0d34-0410-b5e6-96231b3b80d8
* We need to pass the TargetMachine object to the InstPrinter if we are printingBill Wendling2011-03-213-7/+12
| | | | | | | | | | the alias of an InstAlias instead of the thing being aliased. Because we need to know the features that are valid for an InstAlias. This is part of a work-in-progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127986 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply r127953 with fixes: eliminate empty return block if it has no ↵Evan Cheng2011-03-212-0/+15
| | | | | | predecessors; update dominator tree if cfg is modified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127981 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessorsDaniel Dunbar2011-03-192-15/+0
| | | | | | to canonicalize IR", it broke a lot of things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127954 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IREvan Cheng2011-03-192-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to have single return block (at least getting there) for optimizations. This is general goodness but it would prevent some tailcall optimizations. One specific case is code like this: int f1(void); int f2(void); int f3(void); int f4(void); int f5(void); int f6(void); int foo(int x) { switch(x) { case 1: return f1(); case 2: return f2(); case 3: return f3(); case 4: return f4(); case 5: return f5(); case 6: return f6(); } } => LBB0_2: ## %sw.bb callq _f1 popq %rbp ret LBB0_3: ## %sw.bb1 callq _f2 popq %rbp ret LBB0_4: ## %sw.bb3 callq _f3 popq %rbp ret This patch teaches codegenprep to duplicate returns when the return value is a phi and where the phi operands are produced by tail calls followed by an unconditional branch: sw.bb7: ; preds = %entry %call8 = tail call i32 @f5() nounwind br label %return sw.bb9: ; preds = %entry %call10 = tail call i32 @f6() nounwind br label %return return: %retval.0 = phi i32 [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], ... [ 0, %entry ] ret i32 %retval.0 This allows codegen to generate better code like this: LBB0_2: ## %sw.bb jmp _f1 ## TAILCALL LBB0_3: ## %sw.bb1 jmp _f2 ## TAILCALL LBB0_4: ## %sw.bb3 jmp _f3 ## TAILCALL rdar://9147433 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127953 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for legalizing UINT_TO_FP of vectors on platforms which doNadav Rotem2011-03-191-0/+1
| | | | | | | | | | not have native support for this operation (such as X86). The legalized code uses two vector INT_TO_FP operations and is faster than scalarizing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127951 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127852; it's apparently causing an ICE on mingw.Eli Friedman2011-03-181-73/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127909 91177308-0d34-0410-b5e6-96231b3b80d8
* Support explicit argument forms for the X86 string instructions.Joerg Sonnenberger2011-03-181-1/+126
| | | | | | | For now, only the default segments are supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127875 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a target-specific branchless method for double-width relationalEli Friedman2011-03-181-4/+73
| | | | | | | | | | | | | comparisons on x86. Essentially, the way this works is that SUB+SBB sets the relevant flags the same way a double-width CMP would. This is a substantial improvement over the generic lowering in LLVM. The output is also shorter than the gcc-generated output; I haven't done any detailed benchmarking, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127852 91177308-0d34-0410-b5e6-96231b3b80d8
* Move more logic into getTypeForExtArgOrReturn.Cameron Zwarich2011-03-172-6/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127809 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().Cameron Zwarich2011-03-172-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127807 91177308-0d34-0410-b5e6-96231b3b80d8
* A couple new README entries.Eli Friedman2011-03-171-0/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127786 91177308-0d34-0410-b5e6-96231b3b80d8
* The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byteCameron Zwarich2011-03-162-0/+12
| | | | | | | | | | | rather than an int. Thankfully, this only causes LLVM to miss optimizations, not generate incorrect code. This just fixes the zext at the return. We still insert an i32 ZextAssert when reading a function's arguments, but it is followed by a truncate and another i8 ZextAssert so it is not optimized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127766 91177308-0d34-0410-b5e6-96231b3b80d8
* Enabled disassembler support for AVX instructionsSean Callanan2011-03-152-150/+152
| | | | | | | | | in the instruction tables and fixed a few bugs that were causing decode conflicts. Rudimentary tests are coming up in the next patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127646 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 table-generator and disassembler support for the AVXSean Callanan2011-03-154-42/+319
| | | | | | | | | | instruction set. This code adds support for the VEX prefix and for the YMM registers accessible on AVX-enabled architectures. Instruction table support that enables AVX instructions for the disassembler is in an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the x86 32-bit scheduler to register pressure and fix up theEric Christopher2011-03-111-1/+7
| | | | | | | | | corresponding testcases back to the previous versions. Fixes some performance regressions only seen on 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 127359; it broke lencod.Stuart Hastings2011-03-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127382 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit 127368 and 127371. They are exonerated.Evan Cheng2011-03-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127380 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 127368 and 127371 for now.Evan Cheng2011-03-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be moreEvan Cheng2011-03-091-1/+1
| | | | | | | | | | | | | | flexible. If it returns a register class that's different from the input, then that's the register class used for cross-register class copies. If it returns a register class that's the same as the input, then no cross- register class copies are needed (normal copies would do). If it returns null, then it's not at all possible to copy registers of the specified register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127368 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a pasto that broke all x86_64-elf targets.Benjamin Kramer2011-03-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127365 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 byval copies no longer always_inline. <rdar://problem/8706628>Stuart Hastings2011-03-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127359 91177308-0d34-0410-b5e6-96231b3b80d8
* Add createELFObjectTargetWriter method to TargetAsmBackend, which enables ↵Jan Sjödin2011-03-091-4/+10
| | | | | | construction of non-standard ELFObjectWriters that can be used in MCJIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127346 91177308-0d34-0410-b5e6-96231b3b80d8
* Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number ↵NAKAMURA Takumi2011-03-091-3/+5
| | | | | | of fixed args > 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127328 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right ↵Benjamin Kramer2011-03-081-4/+4
| | | | | | | | operand for 1. Found by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127247 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on list-ilp scheduling by default on x86 and x86-64, fix upEric Christopher2011-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | testcases accordingly. Some are currently xfailed and will be filed as bugs to be fixed or understood. Performance results: roughly neutral on SPEC some micro benchmarks in the llvm suite are up between 100 and 150%, only a pair of regressions that are due to be investigated john-the-ripper saw: 10% improvement in traditional DES 8% improvement in BSDI DES 59% improvement in FreeBSD MD5 67% improvement in OpenBSD Blowfish 14% improvement in LM DES Small compile time impact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.Cameron Zwarich2011-03-074-24/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
* Increased the register pressure limit on x86_64 from 8 to 12Andrew Trick2011-03-053-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | regs. This is the only change in this checkin that may affects the default scheduler. With better register tracking and heuristics, it doesn't make sense to artificially lower the register limit so much. Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to give the scheduler a way to account for div and sqrt on targets that don't have an itinerary. It is currently defaults to 10 (the actual number doesn't matter much), but only takes effect on non-default schedulers: list-hybrid and list-ilp. Added several heuristics that can be individually disabled for the non-default sched=list-ilp mode. This helps us determine how much better we can do on a given benchmark than the default scheduler. Certain compute intensive loops run much faster in this mode with the right set of heuristics, and it doesn't seem to have much negative impact elsewhere. Not all of the heuristics are needed, but we still need to experiment to decide which should be disabled by default for sched=list-ilp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127067 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2011-03-051-51/+51
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127065 91177308-0d34-0410-b5e6-96231b3b80d8
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