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* Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.Charles Davis2013-07-124-25/+45
* AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and allStephen Lin2013-07-092-5/+26
* X86: Add comment.Jim Grosbach2013-07-091-0/+5
* X86 fast-isel: Avoid explicit AH subreg reference for [SU]Rem.Jim Grosbach2013-07-091-4/+31
* Reuse %rax after calling __chkstk on win64Nico Rieck2013-07-082-7/+9
* Revert "Proper va_arg/va_copy lowering on win64"Nico Rieck2013-07-081-3/+1
* Revert "Reuse %rax after calling __chkstk on win64"Nico Rieck2013-07-082-9/+7
* Reuse %rax after calling __chkstk on win64Nico Rieck2013-07-072-7/+9
* Proper va_arg/va_copy lowering on win64Nico Rieck2013-07-061-1/+3
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-041-4/+0
* Revert r185595-185596 which broke buildbots.Jakob Stoklund Olesen2013-07-041-0/+4
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-031-4/+0
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...Craig Topper2013-07-031-1/+1
* [DebugInfo] Allow getDebugThreadLocalSymbol to return MCExprUlrich Weigand2013-07-022-2/+2
* PR16493: DebugInfo with TLS on PPC crashing due to invalid relocationDavid Blaikie2013-07-012-0/+9
* X86: POP*rmm: move address operand to (ins) from (outs).Ahmed Bougacha2013-06-301-3/+3
* Fix an off-by-one error. Also make the code a little more explicit in what itChad Rosier2013-06-281-3/+4
* Integrate Assembler: Support X86_64_DTPOFF64 relocationsDavid Blaikie2013-06-281-1/+12
* Get rid of the unused class member.Nadav Rotem2013-06-271-3/+2
* CostModel: improve the cost model for load/store of non power-of-two types su...Nadav Rotem2013-06-271-0/+43
* Don't cast away constness.Benjamin Kramer2013-06-271-1/+2
* Optimized integer vector multiplication operation by replacing it with shift/...Elena Demikhovsky2013-06-261-2/+4
* X86 cost model: Vectorizing integer division is a bad ideaArnold Schwaighofer2013-06-251-0/+25
* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-4/+1
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-1/+4
* Add MI-Sched support for x86 macro fusion.Andrew Trick2013-06-232-0/+164
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-222-3/+3
* DebugInfo: Don't lose unreferenced non-trivial by-value parametersDavid Blaikie2013-06-211-2/+0
* Fix IMULX machine model. Multiple def operands require multiple SchedWrites.Andrew Trick2013-06-214-4/+7
* Update the X86 disassembler to use xacquire and xrelease when appropriate.Kevin Enderby2013-06-203-0/+32
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-9/+7
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-1/+1
* Fix 80 col violation.Nadav Rotem2013-06-181-3/+6
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-181-0/+7
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-182-3/+3
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-165-73/+1
* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-152-0/+11
* Update machine models. Specify buffer sizes for OOO processors.Andrew Trick2013-06-154-7/+7
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-154-8/+0
* X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...Benjamin Kramer2013-06-141-7/+8
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-131-21/+25
* Fix gcc -flto build, by adding LLVM_ATTRIBUTE_USED toPatrik Hagglund2013-06-121-0/+1
* Correct the def registers for the 8bit x86 divide instructions toEric Christopher2013-06-111-4/+4
* Use the Copy we defined above here.Eric Christopher2013-06-111-2/+2
* X86: Stop LEA64_32r doing unspeakable things to its arguments.Tim Northover2013-06-105-70/+221
* Removed PackedDouble domain from scalar instructions. Added more formats for ...Elena Demikhovsky2013-06-092-43/+60
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-077-16/+33
* Remove unused c'tor.Bill Wendling2013-06-071-7/+2
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-2/+2
* [PATCH] Fix VGATHER* operand constraintsMichael Liao2013-06-052-1/+5
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