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* Add complete assembler support for FMA3 instructions, with descriptions and ↵Bruno Cardoso Lopes2010-07-233-0/+72
| | | | | | encodings taken from the AVX manual git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109204 91177308-0d34-0410-b5e6-96231b3b80d8
* The only supported calling convention for X86-64 usesDale Johannesen2010-07-231-1/+14
| | | | | | | | | | | | | | | | | SSE, so we can't return floating point values if this is disabled. Detect this error for clang. With SSE1 only, f64 is a problem; it can be done, but neither llvm-gcc nor clang has ever generated correct code for it. Since nobody noticed this I think it's OK to treat it as an error for now. This also handles SSE-sized vectors of floating point. 8207686, 8204109. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109201 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some AVX instructions which didnt had HasAVX prefix. And also a problem ↵Bruno Cardoso Lopes2010-07-231-6/+8
| | | | | | with PINSRW, which was totally wrong because of a typo I introduced previously git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109198 91177308-0d34-0410-b5e6-96231b3b80d8
* Add remaining AVX instructions (most of them dealing with GR64 destinations. ↵Bruno Cardoso Lopes2010-07-221-5/+30
| | | | | | This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109168 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the JIT "NeedsExactSize" feature and supporting logic.Chris Lattner2010-07-222-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109167 91177308-0d34-0410-b5e6-96231b3b80d8
* X86MCInstLower now depends on AsmPrinter being around.Chris Lattner2010-07-222-32/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109154 91177308-0d34-0410-b5e6-96231b3b80d8
* instead of migrating it to the MC instruction encoder, justChris Lattner2010-07-223-553/+100
| | | | | | | | | | | | | | | | rip out the implementation of X86InstrInfo::GetInstSizeInBytes. The code being ripped out just implemented a copy and hacked up version of the (old) instruction encoder, and is buggy and terrible in other ways. Since "GetInstSizeInBytes" is really only there to support the JIT's "NeedsExactSize" hook (which noone is using), just rip out the code. I will rip out the NeedsExactSize hook next. This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109149 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to fix linking issues with CMake. Please review other CMake users,Chandler Carruth2010-07-221-1/+1
| | | | | | | especially on other platforms. Is there a better way to fix this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109084 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom lower the memory barrier instructions and add supportEric Christopher2010-07-225-18/+75
| | | | | | | | | for lowering without sse2. Add a couple of new testcases. Fixes a few libgomp tests and latent bugs. Remove a few todos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8
* 80-columns.Eric Christopher2010-07-221-9/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109070 91177308-0d34-0410-b5e6-96231b3b80d8
* Make fast isel win64-aware w.r.t. call-clobbered regsNate Begeman2010-07-221-3/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109069 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more 256-bit forms for a bunch of regular AVX instructionsBruno Cardoso Lopes2010-07-212-76/+160
| | | | | | | | Add 64-bit (GR64) versions of some instructions (which are not described in their SSE forms, but are described in AVX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes win64. It was broken by a previous patch where I missed the !isWin64Rafael Espindola2010-07-211-4/+8
| | | | | | and then forced every register to be a vr128 on win64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109060 91177308-0d34-0410-b5e6-96231b3b80d8
* add some rough support for making mcinst lowering work without anChris Lattner2010-07-211-5/+23
| | | | | | | | | asmprinter or mangler around. This is option #B for killing off X86InstrInfo::GetInstSizeInBytes. Option #A (killing "needsexactsize") was sent for consideration to llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109056 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing AVX convert instructions. Those instructions are not described ↵Bruno Cardoso Lopes2010-07-211-22/+56
| | | | | | in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple issues with Win64 ABINate Begeman2010-07-212-6/+3
| | | | | | | | | | | | 1) all registers were spilled as xmm, regardless of actual size 2) win64 abi doesn't do the varargs-size-in-%al thing Still to look into: xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109035 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid AVX instructions to be selected instead of its SSE formBruno Cardoso Lopes2010-07-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109032 91177308-0d34-0410-b5e6-96231b3b80d8
* Pulling out previous patch, must've run the tests inEric Christopher2010-07-213-40/+3
| | | | | | | the wrong directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109005 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower MEMBARRIER on x86 and support processors without SSE2.Eric Christopher2010-07-213-3/+40
| | | | | | | | Fixes a pile of libgomp failures in the llvm-gcc testsuite due to the libcall not existing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109004 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX only vzeroall and vzeroupper instructionsBruno Cardoso Lopes2010-07-212-2/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vpermilps, vpermilpd and vperm2f128 instructionsBruno Cardoso Lopes2010-07-211-0/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to ↵Bruno Cardoso Lopes2010-07-212-11/+45
| | | | | | support it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vextractf128 instructionsBruno Cardoso Lopes2010-07-201-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
* make asmprinter optional, even though passing in null will cause things to ↵Chris Lattner2010-07-202-13/+14
| | | | | | explode right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108955 91177308-0d34-0410-b5e6-96231b3b80d8
* continue pushing dependencies around.Chris Lattner2010-07-202-8/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108952 91177308-0d34-0410-b5e6-96231b3b80d8
* reduce X86MCInstLower dependencies on asmprinter.Chris Lattner2010-07-202-8/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108950 91177308-0d34-0410-b5e6-96231b3b80d8
* pass around MF, not MMI.Chris Lattner2010-07-202-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108949 91177308-0d34-0410-b5e6-96231b3b80d8
* cleanups.Chris Lattner2010-07-202-14/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108947 91177308-0d34-0410-b5e6-96231b3b80d8
* move two asmprinter methods into the asmprinter .cpp file.Chris Lattner2010-07-202-38/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108945 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX instruction vinsertf128Bruno Cardoso Lopes2010-07-202-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
* Constify some arguments.Eric Christopher2010-07-202-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108812 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX vbroadcast new instructionBruno Cardoso Lopes2010-07-202-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMake files.Daniel Dunbar2010-07-202-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108787 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a layering problem by moving the x86 implementationChris Lattner2010-07-194-5/+5
| | | | | | | | | of AsmPrinter and InstLowering into libx86 and out of the asmprinter subdirectory. Now X86/AsmPrinter just depends on MC stuff, not all of codegen and LLVM IR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108782 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-196-81/+128
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the sameDaniel Dunbar2010-07-192-4/+4
| | | | | | | | instruction, we only want to allow the one for the current subtarget. - This also fixes suffix matching for jmp instructions, because it eliminates the ambiguity between 'jmpl' and 'jmpq'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
* X86-64: Mark WINCALL and more tail call instructions as code gen only.Daniel Dunbar2010-07-191-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108685 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Mark some tail call pseduo instruction as code gen only.Daniel Dunbar2010-07-191-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108684 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64].Daniel Dunbar2010-07-192-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108683 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: We now match instructions like "incl %eax" correctly for the arch we areDaniel Dunbar2010-07-192-54/+0
| | | | | | assembling; remove crufty custom cleanup code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real.Daniel Dunbar2010-07-192-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108680 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode.Daniel Dunbar2010-07-191-6/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108679 91177308-0d34-0410-b5e6-96231b3b80d8
* TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> ↵Daniel Dunbar2010-07-191-4/+12
| | | | | | | | attributes as part of the matcher. - Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
* Target: Give the TargetAsmParser access to the TargetMachine.Daniel Dunbar2010-07-191-6/+7
| | | | | | - Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
* the stackifier is global!Chris Lattner2010-07-171-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108626 91177308-0d34-0410-b5e6-96231b3b80d8
* doxygenify some comments.Chris Lattner2010-07-171-19/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108625 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary check that was subsumed into canRealignStack.Eric Christopher2010-07-171-3/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108588 91177308-0d34-0410-b5e6-96231b3b80d8
* Make comment a bit more clear as well as return statement sinceEric Christopher2010-07-171-2/+2
| | | | | | | needsStackRealignment is currently checking the can conditions as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108581 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-162-46/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MI.isCopy.Jakob Stoklund Olesen2010-07-161-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108565 91177308-0d34-0410-b5e6-96231b3b80d8
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