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* Fix a grammaro and clarify a comment.Dan Gohman2009-05-311-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72668 91177308-0d34-0410-b5e6-96231b3b80d8
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-306-72/+156
| | | | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
* (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear ↵Evan Cheng2009-05-301-7/+0
| | | | | | the top 8 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
* Untabification.Bill Wendling2009-05-302-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
* More h-registers tricks: folding zext nodes.Evan Cheng2009-05-292-0/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
* The MONITOR and MWAIT instructions have insufficient information forBill Wendling2009-05-283-10/+27
| | | | | | | | | | | | decoding. Essentially, they both map to the same column in the "opcode extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm complicates decoding this. Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code emitter special case these, a la [SML]FENCE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MOVMSKPDrr encoding.Evan Cheng2009-05-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72535 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PSIGND encoding bug. Patch by Sean Callanan.Evan Cheng2009-05-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72534 91177308-0d34-0410-b5e6-96231b3b80d8
* "The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), butBill Wendling2009-05-282-2/+2
| | | | | | | | | | | the Intel manual (screenshot) says it should be 0b11110110 (f6). The existing encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be 0f e0." Patch by Sean Callanan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72508 91177308-0d34-0410-b5e6-96231b3b80d8
* Added optimization that narrow load / op / store and the 'op' is a bit ↵Evan Cheng2009-05-282-0/+10
| | | | | | | | | | | | | | twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
* Ger rid of some dead code.Eli Friedman2009-05-271-33/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72494 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix sfence jit encoding. Patch by Sean Callanan.Evan Cheng2009-05-271-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72488 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and Eli Friedman2009-05-271-8/+11
| | | | | | | | | | FP_TO_XINT. Necessary for some cleanups I'm working on. Updated from the previous version (r72431) to fix a bug and make some things a bit clearer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72445 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out r72431, it is causing a number of compilation crashes with clang.Daniel Dunbar2009-05-261-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72436 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CPU capabilities for AMD machinesStefanus Du Toit2009-05-263-3/+31
| | | | | | | | | | | | | | | | | - added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP andEli Friedman2009-05-261-4/+4
| | | | | | | | FP_TO_XINT. Necessary for some cleanups I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72431 91177308-0d34-0410-b5e6-96231b3b80d8
* add some late optimizations that GCC does. It thinks these are a winChris Lattner2009-05-251-0/+14
| | | | | | | even on Core2, not just AMD processors which was a surprise to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72396 91177308-0d34-0410-b5e6-96231b3b80d8
* we should eventually add -march=atom and the new atom movbe instruction.Chris Lattner2009-05-251-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72387 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the Eli Friedman2009-05-231-0/+1
| | | | | | | | moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72350 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate CPU string out of SubtargetFeaturesAnton Korobeynikov2009-05-231-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit Eli Friedman2009-05-232-25/+64
| | | | | | | | | | | | | | | systems instead of attempting to promote them to a 64-bit SINT_TO_FP or FP_TO_SINT. This is in preparation for removing the type legalization code from LegalizeDAG: once type legalization is gone from LegalizeDAG, it won't be able to handle the i64 operand/result correctly. This isn't quite ideal, but I don't think any other operation for any target ends up in this situation, so treating this case specially seems reasonable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72324 91177308-0d34-0410-b5e6-96231b3b80d8
* Try again. Allow call to immediate address for ELF or when in static ↵Evan Cheng2009-05-203-5/+18
| | | | | | relocation mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
* Cannot use immediate as call absolute target in PIC mode.Evan Cheng2009-05-201-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72154 91177308-0d34-0410-b5e6-96231b3b80d8
* Add OpSize to 16-bit ADC and SBB.Dale Johannesen2009-05-181-14/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72045 91177308-0d34-0410-b5e6-96231b3b80d8
* Fill in the missing patterns for ADC and SBB.Dale Johannesen2009-05-181-14/+97
| | | | | | | | Some comment cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72022 91177308-0d34-0410-b5e6-96231b3b80d8
* Reflow to fit 80-col.Mike Stump2009-05-141-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71813 91177308-0d34-0410-b5e6-96231b3b80d8
* Reflow to fit 80-col.Mike Stump2009-05-141-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71812 91177308-0d34-0410-b5e6-96231b3b80d8
* Run code placement optimization for targets that want it (arm and x86 for now).Evan Cheng2009-05-131-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-133-33/+53
| | | | | | | | | | | | | booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
* More MSVC fixes -- class/struct conflicts.Bill Wendling2009-05-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71601 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 col violations.Evan Cheng2009-05-121-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71582 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid unneeded SIB byte encoding. Patch by Zoltan Varga.Evan Cheng2009-05-122-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71520 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert a subtract into a negate and an add when it helps x86Dan Gohman2009-05-112-1/+71
| | | | | | | address folding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71446 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename PaddedSize to AllocSize, in the hope that thisDuncan Sands2009-05-093-5/+5
| | | | | | | | will make it more obvious what it represents, and stop it being confused with the StoreSize. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out cycle-finder code and make it generic.Anton Korobeynikov2009-05-081-106/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR4152: asm constraint validation happens before dag combine, so weChris Lattner2009-05-081-29/+28
| | | | | | | | need to work a bit to combine things like (x+c1+c2) into x+c3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71232 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize code placement in loop to eliminate unconditional branches or move ↵Evan Cheng2009-05-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unconditional branch to the outside of the loop. e.g. /// A: /// ... /// <fallthrough to B> /// /// B: --> loop header /// ... /// jcc <cond> C, [exit] /// /// C: /// ... /// jmp B /// /// ==> /// /// A: /// ... /// jmp B /// /// C: --> new loop header /// ... /// <fallthough to B> /// /// B: /// ... /// jcc <cond> C, [exit] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71209 91177308-0d34-0410-b5e6-96231b3b80d8
* Use X86AddrNumOperands instead of magic constant oneDale Johannesen2009-05-061-1/+2
| | | | | | | | | | | | more place. This fixes a bunch of x86-64 JIT regressions. (Introduced when the value of the magic constant changed in 68645. At the time apparently nobody noticed; failures were hidden in 70343-70439 by an unrelated bug, so showed up again as "new" failures in 70440.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71106 91177308-0d34-0410-b5e6-96231b3b80d8
* Add basic support for code generation of Chris Lattner2009-05-052-0/+17
| | | | | | | addrspace(257) -> FS relative on x86. Patch by Zoltan Varga! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert part of 70929 that has to do with determining whether a SIB byte is ↵Evan Cheng2009-05-052-3/+3
| | | | | | needed. It causes a lot of x86_64 JIT failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8
* - Avoid the longer SIB encoding on x86_64 when it's not needed.Evan Cheng2009-05-042-9/+24
| | | | | | | | - Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp Patch by Zoltan Varga. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8
* X86FastISel doesn't support the -tailcallopt ABI.Dan Gohman2009-05-041-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70902 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix compilation for some targets other than x86.Argiris Kirtzidis2009-04-302-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70522 91177308-0d34-0410-b5e6-96231b3b80d8
* Make DebugLoc independent of DwarfWriter.Argiris Kirtzidis2009-04-302-0/+2
| | | | | | | | | -Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable* -Remove DwarfWriter::getOrCreateSourceID -Make necessary changes for the above (fix callsites, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
* Set mayLoad on MOVZX32_NOREXrm8 too.Dan Gohman2009-04-301-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70466 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively.Evan Cheng2009-04-301-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70461 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-297-22/+37
| | | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix infinite recursion in the C++ code which handles movddup by making it ↵Nate Begeman2009-04-292-46/+13
| | | | | | unnecessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement review feedback for vector shuffle work.Nate Begeman2009-04-292-31/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
* Second attempt:Bill Wendling2009-04-297-38/+43
| | | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
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