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* s/CSR_Ghc/CSR_NoRegs/Jakob Stoklund Olesen2012-05-082-3/+3
* Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done...Craig Topper2012-05-081-7/+0
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-073-8/+10
* Fix a regression from r147481. This combine should only happen if there is aChad Rosier2012-05-071-10/+12
* X86: optimization for -(x != 0)Manman Ren2012-05-072-0/+22
* Fix some issues in the f16c instructions.Craig Topper2012-05-071-11/+9
* Add SSE4A MOVNTSS/MOVNTSD instructions.Craig Topper2012-05-071-0/+14
* Use MVT instead of EVT as the argument to all the shuffle decode functions. S...Craig Topper2012-05-063-35/+33
* Add VPERMQ/VPERMPD to the list of target specific shuffles that can be looked...Craig Topper2012-05-061-0/+6
* Add shuffle decode support for VPERMQ/VPERMPD.Craig Topper2012-05-063-0/+22
* Nuke a few dead remnants of the CBE.Jim Grosbach2012-05-051-17/+0
* Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer2012-05-051-0/+3
* Adds Intel Atom scheduling latencies to X86InstrSystem.td.Preston Gurd2012-05-043-139/+272
* Fix some loops to match coding standards. No functional change intended.Craig Topper2012-05-041-6/+8
* Fix up some spacing. No functional change.Craig Topper2012-05-041-6/+6
* Simplify broadcast lowering code. No functional change intended.Craig Topper2012-05-041-17/+7
* Allow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles.Craig Topper2012-05-041-5/+8
* Simplify shuffle narrowing code a bit. No functional change intended.Craig Topper2012-05-041-22/+16
* Remove the SubRegClasses field from RegisterClass descriptions.Jakob Stoklund Olesen2012-05-041-78/+19
* Use 'unsigned' instead of 'int' in a few places dealing with counts of vector...Craig Topper2012-05-031-3/+3
* Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the ...Craig Topper2012-05-032-21/+36
* For Intel Atom, use ILP scheduling always, instead of ILP for 64 bitPreston Gurd2012-05-021-4/+4
* Change the Intel Atom detection code to recognizePreston Gurd2012-05-021-1/+2
* This patch continues the work of adding instruction latencies for X86 Atom,Preston Gurd2012-05-024-68/+171
* Revert r155853Manman Ren2012-05-021-16/+0
* Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support fo...Craig Topper2012-05-024-36/+90
* Remove unneeded break.Jakub Staszak2012-05-011-1/+0
* Remove trailing spaces.Jakub Staszak2012-05-011-43/+43
* This patch marks the X86 floating point stack registers ST0-ST7 as reservedPreston Gurd2012-05-011-0/+10
* X86: optimization for max-like structManman Ren2012-05-011-0/+40
* X86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to...Alexey Samsonov2012-05-012-0/+14
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-6/+6
* Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.Craig Topper2012-05-011-9/+9
* Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B...Craig Topper2012-05-011-9/+8
* Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711.Craig Topper2012-05-011-1/+12
* Make XOP imply AVX as its needed to legalize the registers types.Craig Topper2012-05-011-1/+2
* Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES ...Craig Topper2012-05-011-3/+3
* Make CLMUL and AES imply SSE2 since its needed to legalize the type.Craig Topper2012-05-011-2/+4
* Enable AVX and FMA4 for AMD Bulldozer processors.Craig Topper2012-05-011-5/+5
* X86: optimization for -(x != 0)Manman Ren2012-04-301-0/+16
* Tidy up. No functional change intended.Chad Rosier2012-04-301-8/+7
* Fix fastcc structure return with fast-isel on x86-32Derek Schuff2012-04-301-0/+2
* No need to normalize index before calling Extract128BitVectorCraig Topper2012-04-301-12/+11
* Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT ...Pete Cooper2012-04-302-97/+534
* Remove unneeded casts. No functionality change.Jakub Staszak2012-04-291-11/+11
* Simplify code a bit. No functional change intended.Craig Topper2012-04-291-4/+3
* Revert r155745Derek Schuff2012-04-271-2/+0
* Fix fastcc structure return with fast-isel on x86-32Derek Schuff2012-04-271-0/+2
* Use 'unsigned' instead of 'int' in several places when retrieving number of v...Craig Topper2012-04-271-12/+12
* Add x86-specific DAG combine to simplify:Chad Rosier2012-04-271-0/+28