external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.	Jakob Stoklund Olesen	2013-07-04	1	-4/+0
*	Revert r185595-185596 which broke buildbots.	Jakob Stoklund Olesen	2013-07-04	1	-0/+4
*	Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.	Jakob Stoklund Olesen	2013-07-03	1	-4/+0
*	Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...	Craig Topper	2013-07-03	1	-1/+1
*	[DebugInfo] Allow getDebugThreadLocalSymbol to return MCExpr	Ulrich Weigand	2013-07-02	2	-2/+2
*	PR16493: DebugInfo with TLS on PPC crashing due to invalid relocation	David Blaikie	2013-07-01	2	-0/+9
*	X86: POP*rmm: move address operand to (ins) from (outs).	Ahmed Bougacha	2013-06-30	1	-3/+3
*	Fix an off-by-one error. Also make the code a little more explicit in what it	Chad Rosier	2013-06-28	1	-3/+4
*	Integrate Assembler: Support X86_64_DTPOFF64 relocations	David Blaikie	2013-06-28	1	-1/+12
*	Get rid of the unused class member.	Nadav Rotem	2013-06-27	1	-3/+2
*	CostModel: improve the cost model for load/store of non power-of-two types su...	Nadav Rotem	2013-06-27	1	-0/+43
*	Don't cast away constness.	Benjamin Kramer	2013-06-27	1	-1/+2
*	Optimized integer vector multiplication operation by replacing it with shift/...	Elena Demikhovsky	2013-06-26	1	-2/+4
*	X86 cost model: Vectorizing integer division is a bad idea	Arnold Schwaighofer	2013-06-25	1	-0/+25
*	Revert "Temporarily enable MI-Sched on X86."	Andrew Trick	2013-06-25	1	-4/+1
*	Temporarily enable MI-Sched on X86.	Andrew Trick	2013-06-24	1	-1/+4
*	Add MI-Sched support for x86 macro fusion.	Andrew Trick	2013-06-23	2	-0/+164
*	The getRegForInlineAsmConstraint function should only accept MVT value types.	Chad Rosier	2013-06-22	2	-3/+3
*	DebugInfo: Don't lose unreferenced non-trivial by-value parameters	David Blaikie	2013-06-21	1	-2/+0
*	Fix IMULX machine model. Multiple def operands require multiple SchedWrites.	Andrew Trick	2013-06-21	4	-4/+7
*	Update the X86 disassembler to use xacquire and xrelease when appropriate.	Kevin Enderby	2013-06-20	3	-0/+32
*	Access the TargetLoweringInfo from the TargetMachine object instead of cachin...	Bill Wendling	2013-06-19	1	-9/+7
*	Access the TargetLoweringInfo from the TargetMachine object instead of cachin...	Bill Wendling	2013-06-19	1	-1/+1
*	Fix 80 col violation.	Nadav Rotem	2013-06-18	1	-3/+6
*	Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.	Stefanus Du Toit	2013-06-18	1	-0/+7
*	Use pointers to the MCAsmInfo and MCRegInfo.	Bill Wendling	2013-06-18	2	-3/+3
*	DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...	David Blaikie	2013-06-16	5	-73/+1
*	Support BufferSize on ProcResGroup for unified MOp schedulers.	Andrew Trick	2013-06-15	2	-0/+11
*	Update machine models. Specify buffer sizes for OOO processors.	Andrew Trick	2013-06-15	4	-7/+7
*	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	2013-06-15	4	-8/+0
*	X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...	Benjamin Kramer	2013-06-14	1	-7/+8
*	X86: Make the cmov aliases work with intel syntax too.	Benjamin Kramer	2013-06-13	1	-21/+25
*	Fix gcc -flto build, by adding LLVM_ATTRIBUTE_USED to	Patrik Hagglund	2013-06-12	1	-0/+1
*	Correct the def registers for the 8bit x86 divide instructions to	Eric Christopher	2013-06-11	1	-4/+4
*	Use the Copy we defined above here.	Eric Christopher	2013-06-11	1	-2/+2
*	X86: Stop LEA64_32r doing unspeakable things to its arguments.	Tim Northover	2013-06-10	5	-70/+221
*	Removed PackedDouble domain from scalar instructions. Added more formats for ...	Elena Demikhovsky	2013-06-09	2	-43/+60
*	Don't cache the instruction and register info from the TargetMachine, because	Bill Wendling	2013-06-07	7	-16/+33
*	Remove unused c'tor.	Bill Wendling	2013-06-07	1	-7/+2
*	Cache the TargetLowering info object as a pointer.	Bill Wendling	2013-06-06	1	-2/+2
*	[PATCH] Fix VGATHER* operand constraints	Michael Liao	2013-06-05	2	-1/+5
*	Handle relocations that don't point to symbols.	Rafael Espindola	2013-06-05	2	-11/+10
*	X86: sub_xmm registers are 128 bits wide.	Ahmed Bougacha	2013-06-03	1	-1/+1
*	Revert r183069: "TMP: LEA64_32r fixing"	Tim Northover	2013-06-01	4	-155/+54
*	TMP: LEA64_32r fixing	Tim Northover	2013-06-01	4	-54/+155
*	X86: change MOV64ri64i32 into MOV32ri64	Tim Northover	2013-06-01	4	-32/+45
*	Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it	Eric Christopher	2013-05-31	4	-45/+32
*	Add a way to define the bit range covered by a SubRegIndex.	Ahmed Bougacha	2013-05-31	1	-5/+5
*	X86: change MOV64ri64i32 into MOV32ri64	Tim Northover	2013-05-31	4	-32/+45
*	X86: use sub-register sequences for MOV*r0 operations	Tim Northover	2013-05-30	5	-100/+74