| Commit message (Expand) | Author | Age | Files | Lines |
* | It's essential we clear CodeGenMap after isel every basic block! | Evan Cheng | 2005-12-19 | 1 | -0/+1 |
* | eliminate some redundancy | Chris Lattner | 2005-12-17 | 1 | -8/+8 |
* | Darwin API issue: indirect load of external and weak symbols. | Evan Cheng | 2005-12-17 | 1 | -3/+8 |
* | Remove a few lines of dead code. | Evan Cheng | 2005-12-17 | 1 | -3/+0 |
* | Added an idea about any_extend for performance tuning. | Evan Cheng | 2005-12-17 | 1 | -0/+5 |
* | Added truncate. | Evan Cheng | 2005-12-17 | 1 | -0/+28 |
* | Added anyext, modelled as zext on X86. | Evan Cheng | 2005-12-17 | 1 | -0/+5 |
* | Added some isel ideas. | Evan Cheng | 2005-12-17 | 1 | -0/+14 |
* | Added support for cmp, test, and conditional move instructions. | Evan Cheng | 2005-12-17 | 3 | -111/+327 |
* | Only lower SELECT when using DAG based isel. | Evan Cheng | 2005-12-17 | 2 | -4/+8 |
* | X86 lowers SELECT to a cmp / test followed by a conditional move. | Evan Cheng | 2005-12-17 | 2 | -1/+29 |
* | Don't globalize internal functions | Chris Lattner | 2005-12-16 | 1 | -1/+2 |
* | * Promote all 1 bit entities to 8 bit. | Evan Cheng | 2005-12-15 | 3 | -113/+5 |
* | Added frameindex, constpool, globaladdr, and externalsym as root nodes of | Evan Cheng | 2005-12-15 | 1 | -2/+3 |
* | Handling zero extension of 1 bit value. | Evan Cheng | 2005-12-15 | 1 | -17/+128 |
* | Use MOV8rm to load 1 bit value. | Evan Cheng | 2005-12-15 | 1 | -0/+3 |
* | Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/1... | Evan Cheng | 2005-12-14 | 1 | -1/+1 |
* | Added sext and zext patterns. | Evan Cheng | 2005-12-14 | 1 | -9/+34 |
* | Add load + store folding srl and sra patterns. | Evan Cheng | 2005-12-13 | 1 | -12/+32 |
* | Use the shared asmprinter code for printing special llvm globals | Chris Lattner | 2005-12-13 | 2 | -38/+5 |
* | Add ELF and darwin support for static ctors and dtors | Chris Lattner | 2005-12-13 | 2 | -0/+40 |
* | Beautify a few patterns. | Evan Cheng | 2005-12-13 | 1 | -15/+15 |
* | Some shl patterns which do load + store folding. | Evan Cheng | 2005-12-13 | 1 | -6/+16 |
* | A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:... | Evan Cheng | 2005-12-13 | 1 | -12/+18 |
* | Add and, or, and xor patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -41/+82 |
* | Add inc + dec patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -6/+12 |
* | Add neg and not patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -6/+12 |
* | Missed a couple redundant explicit type casts. | Evan Cheng | 2005-12-13 | 1 | -3/+3 |
* | Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. | Evan Cheng | 2005-12-13 | 1 | -34/+47 |
* | * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. | Evan Cheng | 2005-12-13 | 1 | -27/+33 |
* | Add some integer mul patterns. | Evan Cheng | 2005-12-12 | 1 | -11/+17 |
* | Add some sub patterns. | Evan Cheng | 2005-12-12 | 1 | -13/+24 |
* | When SelectLEAAddr() fails, it shouldn't cause the side effect of having the | Evan Cheng | 2005-12-12 | 1 | -17/+48 |
* | For ISD::RET, if # of operands >= 2, try selection the real data dep. operand | Evan Cheng | 2005-12-12 | 1 | -2/+10 |
* | remove some never-completed and now-obsolete code. | Chris Lattner | 2005-12-12 | 3 | -358/+0 |
* | Add a few more add / store patterns. e.g. ADD32mi8. | Evan Cheng | 2005-12-12 | 1 | -10/+18 |
* | * Added X86 store patterns. | Evan Cheng | 2005-12-10 | 2 | -43/+19 |
* | Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al | Evan Cheng | 2005-12-09 | 1 | -3/+6 |
* | Added explicit type field to ComplexPattern. | Evan Cheng | 2005-12-08 | 1 | -2/+2 |
* | * Added intelligence to X86 LEA addressing mode matching routine so it returns | Evan Cheng | 2005-12-08 | 2 | -84/+103 |
* | X86 doesn't support sextinreg for 8-bit things either. | Chris Lattner | 2005-12-07 | 1 | -0/+1 |
* | Remove unnecessary let hasCtrlDep=1 now it can be inferred. | Evan Cheng | 2005-12-05 | 1 | -27/+25 |
* | Several things: | Chris Lattner | 2005-12-05 | 1 | -24/+32 |
* | Added isel patterns for RET, JMP, and WRITEPORT. | Evan Cheng | 2005-12-04 | 1 | -39/+53 |
* | Fix PR672 another way which should be more robust | Chris Lattner | 2005-12-04 | 1 | -16/+14 |
* | Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672. | Chris Lattner | 2005-12-03 | 1 | -0/+14 |
* | add a note | Chris Lattner | 2005-12-02 | 1 | -0/+6 |
* | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman | 2005-12-01 | 1 | -7/+8 |
* | Proper support for shifts with register shift value. | Evan Cheng | 2005-12-01 | 2 | -44/+24 |
* | SelectNodeTo now returns its result, we must pay attention to it. | Chris Lattner | 2005-11-30 | 1 | -20/+18 |