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* It's essential we clear CodeGenMap after isel every basic block!Evan Cheng2005-12-191-0/+1
* eliminate some redundancyChris Lattner2005-12-171-8/+8
* Darwin API issue: indirect load of external and weak symbols.Evan Cheng2005-12-171-3/+8
* Remove a few lines of dead code.Evan Cheng2005-12-171-3/+0
* Added an idea about any_extend for performance tuning.Evan Cheng2005-12-171-0/+5
* Added truncate.Evan Cheng2005-12-171-0/+28
* Added anyext, modelled as zext on X86.Evan Cheng2005-12-171-0/+5
* Added some isel ideas.Evan Cheng2005-12-171-0/+14
* Added support for cmp, test, and conditional move instructions.Evan Cheng2005-12-173-111/+327
* Only lower SELECT when using DAG based isel.Evan Cheng2005-12-172-4/+8
* X86 lowers SELECT to a cmp / test followed by a conditional move.Evan Cheng2005-12-172-1/+29
* Don't globalize internal functionsChris Lattner2005-12-161-1/+2
* * Promote all 1 bit entities to 8 bit.Evan Cheng2005-12-153-113/+5
* Added frameindex, constpool, globaladdr, and externalsym as root nodes ofEvan Cheng2005-12-151-2/+3
* Handling zero extension of 1 bit value.Evan Cheng2005-12-151-17/+128
* Use MOV8rm to load 1 bit value.Evan Cheng2005-12-151-0/+3
* Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/1...Evan Cheng2005-12-141-1/+1
* Added sext and zext patterns.Evan Cheng2005-12-141-9/+34
* Add load + store folding srl and sra patterns.Evan Cheng2005-12-131-12/+32
* Use the shared asmprinter code for printing special llvm globalsChris Lattner2005-12-132-38/+5
* Add ELF and darwin support for static ctors and dtorsChris Lattner2005-12-132-0/+40
* Beautify a few patterns.Evan Cheng2005-12-131-15/+15
* Some shl patterns which do load + store folding.Evan Cheng2005-12-131-6/+16
* A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:...Evan Cheng2005-12-131-12/+18
* Add and, or, and xor patterns which fold load + stores.Evan Cheng2005-12-131-41/+82
* Add inc + dec patterns which fold load + stores.Evan Cheng2005-12-131-6/+12
* Add neg and not patterns which fold load + stores.Evan Cheng2005-12-131-6/+12
* Missed a couple redundant explicit type casts.Evan Cheng2005-12-131-3/+3
* Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.Evan Cheng2005-12-131-34/+47
* * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.Evan Cheng2005-12-131-27/+33
* Add some integer mul patterns.Evan Cheng2005-12-121-11/+17
* Add some sub patterns.Evan Cheng2005-12-121-13/+24
* When SelectLEAAddr() fails, it shouldn't cause the side effect of having theEvan Cheng2005-12-121-17/+48
* For ISD::RET, if # of operands >= 2, try selection the real data dep. operandEvan Cheng2005-12-121-2/+10
* remove some never-completed and now-obsolete code.Chris Lattner2005-12-123-358/+0
* Add a few more add / store patterns. e.g. ADD32mi8.Evan Cheng2005-12-121-10/+18
* * Added X86 store patterns.Evan Cheng2005-12-102-43/+19
* Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %alEvan Cheng2005-12-091-3/+6
* Added explicit type field to ComplexPattern.Evan Cheng2005-12-081-2/+2
* * Added intelligence to X86 LEA addressing mode matching routine so it returnsEvan Cheng2005-12-082-84/+103
* X86 doesn't support sextinreg for 8-bit things either.Chris Lattner2005-12-071-0/+1
* Remove unnecessary let hasCtrlDep=1 now it can be inferred.Evan Cheng2005-12-051-27/+25
* Several things:Chris Lattner2005-12-051-24/+32
* Added isel patterns for RET, JMP, and WRITEPORT.Evan Cheng2005-12-041-39/+53
* Fix PR672 another way which should be more robustChris Lattner2005-12-041-16/+14
* Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.Chris Lattner2005-12-031-0/+14
* add a noteChris Lattner2005-12-021-0/+6
* Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman2005-12-011-7/+8
* Proper support for shifts with register shift value.Evan Cheng2005-12-012-44/+24
* SelectNodeTo now returns its result, we must pay attention to it.Chris Lattner2005-11-301-20/+18