| Commit message (Expand) | Author | Age | Files | Lines |
| * | Add <cstddef> include to get ptrdiff_t, for gcc-4.6; patch by Dimitry Andric. | Daniel Dunbar | 2010-06-15 | 1 | -0/+1 |
| * | VMOVQQ and VMOVQQQQ are pseudo instructions and not predicable. | Bob Wilson | 2010-06-15 | 1 | -1/+4 |
| * | Revert 105986; looks like I'd better try bootstrapping. | Dale Johannesen | 2010-06-15 | 1 | -4/+2 |
| * | The form of BuildMI used for TAILJMPr was changing the register | Dale Johannesen | 2010-06-15 | 1 | -2/+4 |
| * | Make sure to skip dbg_value instructions when finding an insertion point for | Jim Grosbach | 2010-06-15 | 1 | -1/+2 |
| * | Rename functions referring to VMOV immediates to refer to NEON "modified | Bob Wilson | 2010-06-14 | 3 | -30/+34 |
| * | fix a nasty bug where we were not treating available_externally | Chris Lattner | 2010-06-14 | 1 | -3/+6 |
| * | fix a -Wbool-conversions warning from clang. | Chris Lattner | 2010-06-14 | 1 | -1/+1 |
| * | Add back some possible optimizations for va_arg, with wording that makes it | Eli Friedman | 2010-06-14 | 1 | -0/+31 |
| * | Merge getStoreRegOpcode and getLoadRegOpcode. | Rafael Espindola | 2010-06-12 | 1 | -97/+47 |
| * | Add README entry; based on testcase from Bill Hart. | Eli Friedman | 2010-06-12 | 1 | -0/+44 |
| * | make the avx intrinsics 3 address | Bruno Cardoso Lopes | 2010-06-12 | 1 | -4/+12 |
| * | Add some basic fp intrinsics for AVX | Bruno Cardoso Lopes | 2010-06-12 | 1 | -0/+32 |
| * | More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm | Bruno Cardoso Lopes | 2010-06-12 | 1 | -0/+16 |
| * | More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr | Bruno Cardoso Lopes | 2010-06-12 | 3 | -1/+35 |
| * | Add some comments about REX fields | Bruno Cardoso Lopes | 2010-06-12 | 1 | -10/+10 |
| * | More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) | Bruno Cardoso Lopes | 2010-06-11 | 2 | -6/+40 |
| * | Add a missing bitcast. This code used to only handle conversions between | Bob Wilson | 2010-06-11 | 1 | -1/+2 |
| * | Add instruction encoding for the Neon VMOV immediate instruction. This changes | Bob Wilson | 2010-06-11 | 8 | -121/+221 |
| * | Delete code that's not safe. | Evan Cheng | 2010-06-10 | 1 | -13/+0 |
| * | be slightly more subtle about skipping dbg_value instructions; otherwise, if a | Jim Grosbach | 2010-06-09 | 1 | -5/+6 |
| * | Allow target to place 2-address pass inserted copies in better spots. Thumb2 ... | Evan Cheng | 2010-06-09 | 3 | -12/+52 |
| * | Fix SPU to cope with vector insertelement to an undef position. | Kalle Raiskila | 2010-06-09 | 1 | -3/+8 |
| * | Handle loading from/storing to undef pointers on SPU by inserting a | Kalle Raiskila | 2010-06-09 | 1 | -1/+3 |
| * | Typo. | Evan Cheng | 2010-06-09 | 1 | -1/+1 |
| * | A few new x86-64 specific README entries. | Eli Friedman | 2010-06-09 | 1 | -0/+82 |
| * | Thumb2 IT blocks are fairly expensive. When there are multiple selects using | Evan Cheng | 2010-06-09 | 3 | -13/+292 |
| * | Incremental improvement to the handling of the x86 "Jump if rCX Zero" | Kevin Enderby | 2010-06-08 | 1 | -0/+14 |
| * | Split out these asserts so it's more apparent why we're not assembling | Eric Christopher | 2010-06-08 | 1 | -2/+2 |
| * | fix copy/paste/modify think-o | Jim Grosbach | 2010-06-08 | 1 | -1/+1 |
| * | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes | 2010-06-08 | 8 | -31/+256 |
| * | Ensure that mov and not lea are used to stick the address into | Eric Christopher | 2010-06-08 | 3 | -10/+21 |
| * | fix typo | Jim Grosbach | 2010-06-08 | 1 | -1/+1 |
| * | Flag SPU's function call sequence together. | Kalle Raiskila | 2010-06-08 | 1 | -1/+1 |
| * | Fix up a comment. | Bob Wilson | 2010-06-08 | 1 | -2/+2 |
| * | Further changes for Neon vector shuffles: | Bob Wilson | 2010-06-07 | 2 | -68/+56 |
| * | Handle dbg_value instructions (i.e., skip them) when generating IT blocks. | Jim Grosbach | 2010-06-07 | 1 | -3/+4 |
| * | Create new accessors to get arguments for call/invoke instructions. It breaks | Bill Wendling | 2010-06-07 | 2 | -11/+14 |
| * | This bug is also present in MSVC10. Requested by Elrood on IRC. | Duncan Sands | 2010-06-05 | 1 | -2/+2 |
| * | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner | 2010-06-05 | 8 | -256/+31 |
| * | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes | 2010-06-05 | 8 | -31/+256 |
| * | Improvements to tail call code. No functional effect | Dale Johannesen | 2010-06-05 | 1 | -20/+22 |
| * | Fix some liveout handling related to tail calls, see comments. | Dale Johannesen | 2010-06-05 | 1 | -11/+6 |
| * | More thoroughly disable tails calls by default. | Dale Johannesen | 2010-06-04 | 1 | -3/+3 |
| * | Another fix to prevent debug info from affecting codegen. rdar://7797940 | Jim Grosbach | 2010-06-04 | 1 | -0/+4 |
| * | more dbg_value adjustments so debug info doesn't affect codegen | Jim Grosbach | 2010-06-04 | 1 | -2/+4 |
| * | fix typo | Jim Grosbach | 2010-06-04 | 1 | -1/+1 |
| * | For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and | Bob Wilson | 2010-06-04 | 3 | -31/+75 |
| * | Teach the ARM load-store optimizer to deal with dbg_value instructions. | Jim Grosbach | 2010-06-03 | 1 | -4/+16 |
| * | Early implementation of tail call for ARM. | Dale Johannesen | 2010-06-03 | 5 | -6/+371 |