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* Don't glue users to extract_subreg when selecting the llvm.arm.ldrexdLang Hames2013-03-091-6/+4
* TLI: Microoptimize calls to strlen+memcmp to strncmp.Benjamin Kramer2013-03-091-2/+24
* R600: Optimize another selectcc caseTom Stellard2013-03-081-11/+20
* R600: Improve custom lowering of select_ccTom Stellard2013-03-082-37/+42
* R600: Change operation action from Custom to Expand for BR_CCTom Stellard2013-03-082-43/+2
* R600: Change operation action from Custom to Expand for SETCCTom Stellard2013-03-082-46/+2
* R600: Set BooleanContents to ZeroOrNegativeOneBooleanContentTom Stellard2013-03-081-0/+1
* DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard2013-03-086-6/+24
* Hexagon: Add patterns for zero extended loads from i1->i64.Jyotsna Verma2013-03-082-0/+24
* AArch64: expand sincos operations, we don't support them.Tim Northover2013-03-081-0/+3
* R600/SI: Use source schedulerMichel Danzer2013-03-081-0/+2
* ArrayRefize some code. No functionality change.Benjamin Kramer2013-03-074-36/+26
* Hexagon: Handle i8, i16 and i1 Var Args.Jyotsna Verma2013-03-071-0/+10
* Hexagon: Add support to lower block address.Jyotsna Verma2013-03-074-0/+28
* X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.Benjamin Kramer2013-03-071-0/+5
* R600/SI: rework input interpolation v2Christian Konig2013-03-0712-321/+46
* R600/SI: remove SI_vs_load_buffer_indexChristian Konig2013-03-072-15/+0
* R600/SI: remove SGPR address space v2Christian Konig2013-03-075-70/+21
* R600/SI: add proper formal parameter handling for SIChristian Konig2013-03-077-22/+163
* R600/SI: remove shader type intrinsicChristian Konig2013-03-076-18/+18
* R600/SI: switch types of SGPRs to v*i8Christian Konig2013-03-074-11/+24
* R600/SI: fix unused variable warningChristian Konig2013-03-071-1/+0
* Fix two remaining issue after fixing PR15355 when CMOV is not availableMichael Liao2013-03-071-6/+22
* [mips] Custom-legalize BR_JT.Akira Hatanaka2013-03-062-1/+33
* Fix PR15355Michael Liao2013-03-061-102/+182
* [mips] Remove android calling convention.Akira Hatanaka2013-03-054-19/+1
* [mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 getsAkira Hatanaka2013-03-052-40/+55
* [mips] Fix MipsTargetLowering::LowerCallResult and LowerReturn to correctlyAkira Hatanaka2013-03-052-15/+74
* [mips] Fix MipsTargetLowering::LowerCall to pass fp128 arguments in floatingAkira Hatanaka2013-03-052-6/+15
* [mips] Correct handling of fp128 (long double) formals and read long doubleAkira Hatanaka2013-03-052-9/+79
* Add more functions to the TLI.Meador Inge2013-03-051-9/+212
* reverting patch 176508.Jyotsna Verma2013-03-054-28/+0
* Hexagon: Add support for lowering block address.Jyotsna Verma2013-03-054-0/+28
* R600: Do not predicate vector opVincent Lejeune2013-03-051-0/+2
* Hexagon: Expand addc, adde, subc and sube.Jyotsna Verma2013-03-051-0/+23
* Update cmake build.Benjamin Kramer2013-03-051-0/+1
* Hexagon: Use MO operand flags to mark constant extended instructions.Jyotsna Verma2013-03-053-471/+43
* Hexagon: Add encoding bits to the TFR64 instructions.Jyotsna Verma2013-03-051-20/+46
* R600: initial scheduler codeVincent Lejeune2013-03-053-1/+624
* R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.Vincent Lejeune2013-03-055-228/+11
* R600: Turn BUILD_VECTOR into Reg_SequenceVincent Lejeune2013-03-052-1/+29
* R600: CONST_ADDRESS node is not marked as mayLoad anymoreVincent Lejeune2013-03-051-1/+1
* R600: Use MUL_IEEE for trig/fdiv intrinsicVincent Lejeune2013-03-051-4/+4
* R600: Add support for indirect addressing of non default const bufferVincent Lejeune2013-03-052-7/+8
* The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr2013-03-051-12/+12
* [mips] Print move instructions.Akira Hatanaka2013-03-042-2/+2
* Mips specific inline assembler constraint 'R'Jack Carter2013-03-041-0/+5
* Bypass Slow DividesPreston Gurd2013-03-041-2/+5
* R600: Clean up datalayout strings so they better match hardware capabilitiesTom Stellard2013-03-042-12/+23
* Mips ISD typoJia Liu2013-03-041-1/+1
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