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* BlockHasNoFallThrough() now returns true if block ends with a return instruct...Evan Cheng2007-05-213-0/+8
* Apply this patch:Dan Gohman2007-05-181-1/+1
* add a noteChris Lattner2007-05-181-0/+9
* Use MVT::FIRST_VECTOR_VALUETYPE and MVT::LAST_VECTOR_VALUETYPE.Dan Gohman2007-05-181-2/+2
* Mark calls non-predicable for now. Need to ensure it's the last instruction i...Evan Cheng2007-05-181-8/+8
* Silence some compilation warnings.Evan Cheng2007-05-181-2/+2
* Set ARM if-conversion block size threshold to 10 instructions for now.Evan Cheng2007-05-181-2/+2
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ...Evan Cheng2007-05-186-30/+37
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ...Evan Cheng2007-05-186-28/+35
* More effective breakdown of memcpy into repeated load/store. These are nowDale Johannesen2007-05-172-1/+77
* Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an opti...Evan Cheng2007-05-171-24/+61
* Added missing patterns for UNPCKH* and PUNPCKH*.Evan Cheng2007-05-171-0/+20
* This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn'tChris Lattner2007-05-171-2/+5
* Revert patch for PR1427. It breaks almost all vector tests.Anton Korobeynikov2007-05-171-10/+1
* add support for 128-bit add/sub on ppc64Chris Lattner2007-05-171-0/+34
* add support for 128-bit integer add/subChris Lattner2007-05-171-0/+20
* Fix PR1427 and test/CodeGen/X86/mmx-shuffle.llChris Lattner2007-05-171-1/+10
* Remove. Not needed.Evan Cheng2007-05-171-4/+0
* Default implementation of TargetInstrInfo::getBlockSize().Evan Cheng2007-05-161-0/+4
* ARM::tB is also predicable.Evan Cheng2007-05-161-2/+5
* PredicateInstruction returns true if the operation was successful.Evan Cheng2007-05-163-18/+27
* Add default implementation of PredicateInstruction().Evan Cheng2007-05-161-0/+20
* Move if-conversion after all passes that may use register scavenger.Evan Cheng2007-05-162-9/+3
* Removed isPredicable().Evan Cheng2007-05-162-10/+0
* Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operan...Evan Cheng2007-05-161-5/+6
* Added isPredicable bit to class Instruction.Evan Cheng2007-05-161-0/+1
* Conditional branch is not a barrier.Evan Cheng2007-05-161-4/+6
* implement the missing maskmovq mmx intrinsic that akor hit.Chris Lattner2007-05-161-1/+3
* Fix comment.Evan Cheng2007-05-161-1/+1
* Hooks for predication support.Evan Cheng2007-05-164-0/+39
* fix some subtle inline asm selection issuesChris Lattner2007-05-151-9/+17
* Add PredicateOperand to all ARM instructions that have the condition field.Evan Cheng2007-05-159-360/+492
* fix subtle bugs in inline asm operand selectionChris Lattner2007-05-151-3/+4
* Fix previous patch. GOTOFF can be used only when the symbol has internalLauro Ramos Venancio2007-05-141-1/+1
* Optimize PIC implementation. GOTOFF can be used when the symbol is definedLauro Ramos Venancio2007-05-141-1/+1
* Enable aliases on arm-linux.Lauro Ramos Venancio2007-05-141-0/+1
* Fix PR1413Chris Lattner2007-05-131-0/+5
* More DWARF-related things cleanup:Anton Korobeynikov2007-05-122-9/+10
* add some notesChris Lattner2007-05-101-0/+28
* Switch BCC, MOVCCr, etc. to PredicateOperand.Evan Cheng2007-05-084-17/+22
* PredicateOperand can be used as a normal operand for isel.Evan Cheng2007-05-082-2/+2
* R0 is a sub-register of X0, etc.Evan Cheng2007-05-081-3/+3
* Fix PR1390 in a better way.Lauro Ramos Venancio2007-05-071-12/+41
* This is no longer needed after enabling the DAG combiner xform.Evan Cheng2007-05-071-5/+0
* add this backChris Lattner2007-05-061-0/+1
* Update MSIL BE. This patch fixes most weird glitches outlined inAnton Korobeynikov2007-05-063-145/+446
* 3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX.Bill Wendling2007-05-061-3/+5
* Reference correct headerNate Begeman2007-05-061-1/+1
* Fix PR1390.Lauro Ramos Venancio2007-05-051-38/+10
* add a noteChris Lattner2007-05-051-0/+25
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