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* [ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,Chad Rosier2012-08-211-4/+6
* Fix up indentation and remove a couple else's after returns.Craig Topper2012-08-211-11/+12
* Use uint16_t for tables of opcodes.Craig Topper2012-08-211-2/+2
* Fix up indentation. No functional change.Craig Topper2012-08-211-61/+61
* Add a couple llvm_unreachables. Add a message to several others.Craig Topper2012-08-211-8/+6
* Replace a break with llvm_unreachable in the default case of a nested switch....Craig Topper2012-08-211-50/+18
* Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar f...Craig Topper2012-08-211-44/+49
* Merge FMA3 instructions with and without patterns into single classes using n...Craig Topper2012-08-211-38/+21
* Add a missing def flag.Jakob Stoklund Olesen2012-08-211-4/+2
* Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.Jakob Stoklund Olesen2012-08-201-3/+2
* fix HexagonSubtarget parsing of -mv flagSebastian Pop2012-08-201-17/+16
* fix a case where all operands of BUILD_VECTOR are undefinedMichael Liao2012-08-201-0/+4
* Fix coding style violations in 162135 and 162136.Akira Hatanaka2012-08-202-39/+39
* Remove FMA3 intrinsic instructions in favor of patterns.Craig Topper2012-08-202-94/+146
* Use correct intrinsic for 256-bit VFMSUBADDPS.Craig Topper2012-08-201-1/+1
* Remove trailing white space and tab characters. No functional change.Craig Topper2012-08-191-33/+33
* When unsafe math is used, we can use commutative FMAX and FMIN. In some casesNadav Rotem2012-08-194-3/+59
* Fabs folding is implemented.Benjamin Kramer2012-08-191-5/+0
* Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen2012-08-183-174/+0
* Remove virtual from many methods. These methods replace methods in the base c...Craig Topper2012-08-181-38/+40
* Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen2012-08-181-47/+84
* Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen2012-08-181-9/+42
* Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow be...Nadav Rotem2012-08-181-15/+60
* fp16-to-fp32 conversion instructions are available in Thumb mode as well.Anton Korobeynikov2012-08-181-4/+4
* Refactor code a bit to reduce number of calls in the final compiled code. No ...Craig Topper2012-08-181-134/+144
* Reorder initialization list to silence -WreorderCraig Topper2012-08-181-2/+2
* Revert r162160 because it made a few buildbots fail.Nadav Rotem2012-08-181-43/+6
* The X86 backend has a number of optimizations for SETCC nodes which useNadav Rotem2012-08-181-6/+43
* Add MipsELFWriterInfo.{h,cpp}.Akira Hatanaka2012-08-172-0/+151
* Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka2012-08-174-3/+13
* Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen2012-08-171-0/+3
* Add stub methods for mips assembly matcher. Akira Hatanaka2012-08-178-6/+97
* Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling2012-08-172-4/+3
* Add comment, clean up code. No functional change.Jakob Stoklund Olesen2012-08-171-30/+39
* Implement NEON domain switching for scalar <-> S-register vmovs on ARMTim Northover2012-08-171-15/+97
* Use nested switch to select arguments to reduce calls to EmitPCMP.Craig Topper2012-08-171-5/+20
* Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce...Craig Topper2012-08-172-19/+30
* Remove unnecessary include of ARMGenInstrInfo.inc.Craig Topper2012-08-171-1/+0
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-163-0/+51
* Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen2012-08-165-53/+73
* Revert r162034, r162035 and r162037.Roman Divacky2012-08-162-20/+1
* Define and handle additional fixup kinds. By Adhemerval Zanella.Roman Divacky2012-08-162-1/+20
* Fix typo and grammar. By Adhemerval Zanella.Roman Divacky2012-08-161-1/+1
* [arm-fast-isel] Add support for fastcc.Jush Lu2012-08-161-3/+6
* Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.Anitha Boyapati2012-08-161-2/+2
* git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34...Anitha Boyapati2012-08-161-2/+2
* Add Android ABI to Mips backend to handle functions returning vectors of fourAkira Hatanaka2012-08-163-0/+18
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-155-2/+104
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...Evan Cheng2012-08-154-2/+50
* Add missing Rfalse operand to the predicated pseudo-instructions.Jakob Stoklund Olesen2012-08-153-28/+41