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* Added method to get Mips register numbersBruno Cardoso Lopes2007-08-283-61/+113
* Changed stack allocation On LowerFORMAL_ARGUMENTS.Bruno Cardoso Lopes2007-08-281-20/+29
* Mask directive completed with CalleeSave infoBruno Cardoso Lopes2007-08-282-73/+111
* Added methods to record SPOffsets from LowerFORMAL_ARGUMENTSBruno Cardoso Lopes2007-08-281-3/+53
* Add a comment about using libc memset/memcpy or generating inline code.Rafael Espindola2007-08-271-2/+5
* call libc memcpy/memset if array size is bigger then threshold.Rafael Espindola2007-08-271-4/+4
* rename isOperandValidForConstraint to LowerAsmOperandForConstraint, Chris Lattner2007-08-254-36/+66
* Disable EH generation until PPC works 100%.Chris Lattner2007-08-241-1/+1
* add a noteChris Lattner2007-08-241-0/+14
* add some notes on really poor codegen.Chris Lattner2007-08-231-0/+44
* new exampleChris Lattner2007-08-231-0/+17
* Add the PCSymbol for Darwin x86 platforms.Bill Wendling2007-08-221-0/+1
* InlineAsm asm support for integer registers addedBruno Cardoso Lopes2007-08-212-0/+81
* Instruction Itinerary attribution fixedBruno Cardoso Lopes2007-08-211-0/+1
* Use only 1 knob to enable exceptions on Darwin :). Anton Korobeynikov2007-08-211-0/+8
* Partial implementation of calling functions with byval arguments:Rafael Espindola2007-08-201-1/+21
* add a noteChris Lattner2007-08-201-0/+18
* MipsHi now has ouput flagBruno Cardoso Lopes2007-08-181-91/+185
* Fixed stack frame addressing bugBruno Cardoso Lopes2007-08-181-8/+8
* support for Schedule included on Mips.tdBruno Cardoso Lopes2007-08-182-28/+15
* Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddressBruno Cardoso Lopes2007-08-182-17/+11
* Couple of small changes. Delay Slot handle header declared. Bruno Cardoso Lopes2007-08-182-2/+3
* Added InstrItinClass support for instruction formatsBruno Cardoso Lopes2007-08-181-9/+10
* Branch Analysis and InsertNoop inserted into header filesBruno Cardoso Lopes2007-08-181-2/+36
* createMipsDelaySlotFillerPass added to mips codegen runtime Bruno Cardoso Lopes2007-08-181-2/+2
* Added Branch Analysis support Bruno Cardoso Lopes2007-08-181-5/+234
* LowerRETURNADDR removed since it was wrong and does not have utility yet!Bruno Cardoso Lopes2007-08-181-2/+3
* InstrItineraryData support on added.Bruno Cardoso Lopes2007-08-181-2/+8
* A Pass to insert Nops on intructions with DelaySlotBruno Cardoso Lopes2007-08-181-0/+77
* Mips generic fallback instruction schedule support!Bruno Cardoso Lopes2007-08-181-0/+63
* Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixedAnton Korobeynikov2007-08-153-14/+24
* add a note.Chris Lattner2007-08-151-0/+3
* Fix a typo pointd out by Maarten ter Huurne.Evan Cheng2007-08-131-1/+1
* When x86 addresses matching exceeds its recursion limit, check toDan Gohman2007-08-131-6/+12
* Fix PR1607Chris Lattner2007-08-131-3/+3
* expand a noteChris Lattner2007-08-111-3/+22
* With evan's explicit flag representation, hopefully we will finally beChris Lattner2007-08-111-1/+1
* 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.Bill Wendling2007-08-111-6/+21
* Use subregs to improve any_extend code generation when feasible.Christopher Lamb2007-08-102-16/+33
* Increase efficiency of sign_extend_inreg by using subregisters for truncation...Christopher Lamb2007-08-103-49/+89
* Edit README in light of previous LEA16 commit.Christopher Lamb2007-08-101-3/+1
* Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via sub...Christopher Lamb2007-08-101-10/+47
* propagate struct size and alignment of byval arguments to the DAGRafael Espindola2007-08-101-1/+6
* For kicks, I though it would be fun to use the correct opcode.Bill Wendling2007-08-101-31/+32
* Adding SSSE3 intrinsics.Bill Wendling2007-08-101-17/+284
* Temporarily backing out this change until we know why some dejagnu tests are ...Evan Cheng2007-08-091-3/+2
* divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the inst...Evan Cheng2007-08-092-4/+46
* GR16_ sub-register class should be GR8_, not GR8. That is, it should only be ...Evan Cheng2007-08-091-3/+4
* long double 9 of N. This finishes up the X86-32 bitsDale Johannesen2007-08-091-1/+13
* Fix arguments for some Altivec instructions. From SWB.Dale Johannesen2007-08-091-9/+15
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