| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add Mac OS X compatible JIT callback routine. | Evan Cheng | 2008-09-02 | 1 | -5/+29 |
| * | Revamp ARM JIT. | Evan Cheng | 2008-09-02 | 1 | -490/+375 |
| * | Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be... | Evan Cheng | 2008-09-02 | 2 | -12/+15 |
| * | Control flow instruction encodings. | Evan Cheng | 2008-09-01 | 2 | -17/+71 |
| * | ldm / stm instruction encodings. | Evan Cheng | 2008-09-01 | 2 | -6/+28 |
| * | AXI2 and AXI3 instruction encodings. | Evan Cheng | 2008-09-01 | 2 | -10/+94 |
| * | Reorganize instruction formats again; AXI1 encoding. | Evan Cheng | 2008-09-01 | 1 | -34/+35 |
| * | addrmode3 instruction encodings. | Evan Cheng | 2008-09-01 | 2 | -42/+208 |
| * | Reorganize some instruction format definitions. No functionality change. | Evan Cheng | 2008-09-01 | 1 | -18/+29 |
| * | Rest of addrmode2 instruction encodings. | Evan Cheng | 2008-09-01 | 2 | -14/+106 |
| * | Addr2 word / byte load encodings. | Evan Cheng | 2008-08-31 | 2 | -4/+24 |
| * | Addr1 instructions opcodes are encoded in bits 21-24; encode S bit. | Evan Cheng | 2008-08-31 | 1 | -4/+5 |
| * | fix a bunch of 80-col violations | Gabor Greif | 2008-08-31 | 5 | -33/+65 |
| * | Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR | Bill Wendling | 2008-08-31 | 1 | -3/+7 |
| * | Expand for ROTR with MVT::i64. | Bill Wendling | 2008-08-31 | 1 | -0/+1 |
| * | fix some 80-col violations | Gabor Greif | 2008-08-30 | 2 | -3/+5 |
| * | For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But v... | Evan Cheng | 2008-08-30 | 1 | -1/+1 |
| * | Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shi... | Evan Cheng | 2008-08-30 | 2 | -0/+56 |
| * | Add ppc partial-word ATOMIC_CMP_SWAP. | Dale Johannesen | 2008-08-30 | 1 | -4/+143 |
| * | Swap fp comparison operands and change predicate to allow load folding (safel... | Evan Cheng | 2008-08-29 | 1 | -16/+50 |
| * | Use static_cast instead of C style cast. | Evan Cheng | 2008-08-29 | 1 | -1/+2 |
| * | Backing out 55521. Not safe. | Evan Cheng | 2008-08-29 | 3 | -49/+5 |
| * | Add partial word version of ATOMIC_SWAP. | Dale Johannesen | 2008-08-29 | 1 | -50/+29 |
| * | Add initial support for fast isel of instructions that have inputs pinned to ... | Owen Anderson | 2008-08-29 | 1 | -0/+1 |
| * | TableGen'ing instruction encodings. | Evan Cheng | 2008-08-29 | 1 | -1/+2 |
| * | addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 e... | Evan Cheng | 2008-08-29 | 1 | -3/+10 |
| * | MVN is addrmode1. | Evan Cheng | 2008-08-29 | 1 | -7/+7 |
| * | More refactoring. | Evan Cheng | 2008-08-29 | 2 | -45/+55 |
| * | Swap fp comparison operands and change predicate to allow load folding. | Evan Cheng | 2008-08-28 | 3 | -5/+49 |
| * | Refactor ARM instruction format definitions into a separate file. No function... | Evan Cheng | 2008-08-28 | 2 | -215/+232 |
| * | Add a target callback for FastISel. | Dan Gohman | 2008-08-28 | 1 | -0/+20 |
| * | remove tabs, fix > 80 cols | Gabor Greif | 2008-08-28 | 1 | -10/+16 |
| * | erect abstraction boundaries for accessing SDValue members, rename Val -> Nod... | Gabor Greif | 2008-08-28 | 20 | -409/+409 |
| * | In lowering SELECT_CC, removed cases where we can't flip the true and false w... | Mon P Wang | 2008-08-28 | 1 | -8/+0 |
| * | Use resize instead of reserve. Reserve doesn't change size(). | Rafael Espindola | 2008-08-28 | 1 | -1/+1 |
| * | Implement partial-word binary atomics on ppc. | Dale Johannesen | 2008-08-28 | 3 | -0/+219 |
| * | FsFLD0S{S|D} and V_SETALLONES are as cheap as moves. | Evan Cheng | 2008-08-28 | 1 | -3/+3 |
| * | Split the ATOMIC NodeType's to include the size, e.g. | Dale Johannesen | 2008-08-28 | 4 | -225/+134 |
| * | Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the | Bill Wendling | 2008-08-27 | 2 | -7/+11 |
| * | Reinstate the x86-64 portion of r55190. When doing extloads into | Dan Gohman | 2008-08-27 | 1 | -9/+8 |
| * | disallow direct access to SDValue::ResNo, provide a getter instead | Gabor Greif | 2008-08-26 | 8 | -13/+13 |
| * | These assertions should be return false's instead, allowing the client to det... | Owen Anderson | 2008-08-26 | 1 | -4/+8 |
| * | Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ... | Owen Anderson | 2008-08-26 | 16 | -53/+72 |
| * | If an xmm register is referenced explicitly in an inline asm, make sure to | Chris Lattner | 2008-08-26 | 1 | -49/+61 |
| * | This is done. | Evan Cheng | 2008-08-26 | 1 | -21/+0 |
| * | Implement 32 & 64 bit versions of PPC atomic | Dale Johannesen | 2008-08-25 | 5 | -48/+230 |
| * | 80 col. violations. | Evan Cheng | 2008-08-25 | 1 | -3/+4 |
| * | Try approach to moving call address load inside of callseq_start. Now it's do... | Evan Cheng | 2008-08-25 | 2 | -35/+108 |
| * | Remove PPC-specific lowering for atomics; the | Dale Johannesen | 2008-08-25 | 4 | -108/+12 |
| * | It's important for the cmp-and-swap to balance | Dale Johannesen | 2008-08-25 | 1 | -13/+31 |
