| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Map address space 256 to gs; similar mappings could be supported for the | Nate Begeman | 2009-01-26 | 2 | -0/+20 |
| * | Support pattern matching various x86 sse shifts. | Nate Begeman | 2009-01-26 | 1 | -0/+93 |
| * | silence a warning when assertions are disabled. | Chris Lattner | 2009-01-25 | 1 | -3/+3 |
| * | should have removed the + when manually applying a patch! | Torok Edwin | 2009-01-25 | 1 | -2/+2 |
| * | revert this patch for now, because Codegen does still want to generate SSE code, | Torok Edwin | 2009-01-25 | 1 | -0/+4 |
| * | If user explicitly asks not to use SSE, don't force it. This fixes LLVM part ... | Torok Edwin | 2009-01-25 | 1 | -2/+0 |
| * | Private linkage support for PPC / Darwin. | Evan Cheng | 2009-01-25 | 1 | -0/+2 |
| * | Fix an indent and a typo. | Nate Begeman | 2009-01-24 | 1 | -1/+1 |
| * | add note about possible GEP improvement with fields of size 0. | Torok Edwin | 2009-01-24 | 1 | -0/+6 |
| * | hopefully address PR3379 by making the P modifier work in x86 inline asm. | Chris Lattner | 2009-01-23 | 1 | -0/+3 |
| * | Add SelectionDAG::getNOT method to construct bitwise NOT operations, | Bob Wilson | 2009-01-22 | 1 | -8/+3 |
| * | Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and Supe... | Evan Cheng | 2009-01-22 | 1 | -1/+2 |
| * | add a note | Chris Lattner | 2009-01-22 | 1 | -0/+10 |
| * | Recognize inline asm for bswap on x86-64 GLIBC. This allows it | Dan Gohman | 2009-01-21 | 1 | -1/+11 |
| * | Also favors NOT64r. | Evan Cheng | 2009-01-21 | 1 | -1/+1 |
| * | fix warning in release-asserts mode and spelling of assert. | Chris Lattner | 2009-01-21 | 1 | -3/+2 |
| * | Fix a recent regression. ClrOpcode is not set for i8; for i8, if | Dan Gohman | 2009-01-21 | 1 | -2/+3 |
| * | Fixed build warnings. Restoring changes done in 62600, they were lost in 62655. | Sanjiv Gupta | 2009-01-21 | 2 | -4/+5 |
| * | Cleanup whitespace and comments, and tweak some | Duncan Sands | 2009-01-21 | 2 | -9/+11 |
| * | Implement LowerOperationWrapper for legalizer. | Sanjiv Gupta | 2009-01-21 | 5 | -138/+174 |
| * | CellSPU: | Scott Michel | 2009-01-21 | 8 | -130/+313 |
| * | Favors generating "not" over "xor -1". For example. | Evan Cheng | 2009-01-21 | 1 | -0/+3 |
| * | Change TargetInstrInfo::isMoveInstr to return source and destination sub-regi... | Evan Cheng | 2009-01-20 | 22 | -66/+90 |
| * | Add a README entry noticed while investigating PR3216. | Dan Gohman | 2009-01-20 | 1 | -0/+22 |
| * | DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instea... | Evan Cheng | 2009-01-19 | 1 | -1/+1 |
| * | Fix 80 col violations. | Evan Cheng | 2009-01-19 | 1 | -2/+2 |
| * | Handle ISD::DECLARE with PIC relocation model. | Evan Cheng | 2009-01-19 | 1 | -4/+15 |
| * | Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two use... | Evan Cheng | 2009-01-19 | 1 | -2/+2 |
| * | Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't | Evan Cheng | 2009-01-19 | 1 | -1/+8 |
| * | Extend thi | Bill Wendling | 2009-01-17 | 1 | -11/+12 |
| * | Fix MatchAddress bug that's preventing negative displacement from being folde... | Evan Cheng | 2009-01-17 | 1 | -14/+13 |
| * | Temporarily revert my last change. It is causing a bootstrap failure. | Bill Wendling | 2009-01-17 | 1 | -0/+4 |
| * | Implement a special algorithm for converting uint_to_fp for i32 values on | Bill Wendling | 2009-01-17 | 2 | -49/+105 |
| * | CMake: Add lib/Target/IA64/IA64Subtarget.cpp | Oscar Fuentes | 2009-01-17 | 1 | -0/+1 |
| * | Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::Lower... | Evan Cheng | 2009-01-16 | 2 | -4/+21 |
| * | Give IA64 a TargetSubtarget subclass, so that it can | Dan Gohman | 2009-01-16 | 3 | -0/+49 |
| * | Add support for non-zero __builtin_return_address values on X86. | Bill Wendling | 2009-01-16 | 1 | -8/+17 |
| * | ARMCompilationCallback should not save / restore vfp registers if vfp is not ... | Evan Cheng | 2009-01-16 | 1 | -2/+2 |
| * | Initial hazard recognizer support in post-pass scheduling. This includes | Dan Gohman | 2009-01-16 | 2 | -5/+0 |
| * | Generalize the HazardRecognizer interface so that it can be used | Dan Gohman | 2009-01-15 | 6 | -19/+26 |
| * | Fix Alpha test and support for private linkage. | Rafael Espindola | 2009-01-15 | 1 | -1/+2 |
| * | Expand insert/extract of a <4 x i32> with a variable index. | Mon P Wang | 2009-01-15 | 1 | -2/+10 |
| * | Add the private linkage. | Rafael Espindola | 2009-01-15 | 19 | -51/+68 |
| * | Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph | Dan Gohman | 2009-01-15 | 10 | -10/+10 |
| * | Add load-folding table entries for BT*ri8 instructions. | Dan Gohman | 2009-01-15 | 1 | -0/+3 |
| * | Make getWidenVectorType const. | Dan Gohman | 2009-01-15 | 2 | -2/+2 |
| * | Const-qualify getPreIndexedAddressParts and friends. | Dan Gohman | 2009-01-15 | 4 | -14/+15 |
| * | Don't fold address calculations which use negative offsets into | Richard Osborne | 2009-01-15 | 1 | -2/+2 |
| * | Update the operands used when building LDAWSP instructions to match the .td | Richard Osborne | 2009-01-15 | 2 | -2/+1 |
| * | - Convert remaining i64 custom lowering into custom instruction emission | Scott Michel | 2009-01-15 | 7 | -185/+333 |
