external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	PowerPC: Simplify BLR pattern.	Ulrich Weigand	2013-03-26	3	-12/+6
*	PowerPC: Move some 64-bit branch patterns.	Ulrich Weigand	2013-03-26	1	-17/+18
*	R600: fix DenseMap with pointer key iteration in the structurizer	Christian Konig	2013-03-26	1	-2/+4
*	ARM Scheduler Model: Add resources instructions, map resources in subtargets	Arnold Schwaighofer	2013-03-26	4	-24/+70
*	ARM Scheduler Model: Partial implementation of the new machine scheduler model	Arnold Schwaighofer	2013-03-26	1	-0/+57
*	Revise alignment checking/calculation on 256-bit unaligned memory access	Michael Liao	2013-03-25	1	-7/+6
*	Add a scheduling model for Intel Sandy Bridge microarchitecture.	Jakob Stoklund Olesen	2013-03-25	1	-0/+123
*	Remove IIC_DEFAULT from X86Schedule.td	Jakob Stoklund Olesen	2013-03-25	5	-78/+76
*	Annotate X86InstrCompiler.td with SchedRW lists.	Jakob Stoklund Olesen	2013-03-25	1	-10/+20
*	Annotate shifts and rotates with SchedRW lists.	Jakob Stoklund Olesen	2013-03-25	1	-17/+37
*	X86DisassemblerDecoder.c: Make this C89-compliant.	NAKAMURA Takumi	2013-03-25	1	-1/+1
*	Whitespace.	NAKAMURA Takumi	2013-03-25	1	-160/+160
*	Fix comment.	Akira Hatanaka	2013-03-25	1	-3/+3
*	Use direct types in PowerPC instruction patterns.	Ulrich Weigand	2013-03-25	2	-270/+262
*	Use direct types in PowerPC Pat patterns.	Ulrich Weigand	2013-03-25	2	-113/+113
*	x86 -- add the XTEST instruction	Dave Zarzycki	2013-03-25	4	-31/+30
*	x86 -- disassemble the REP/REPNE prefix when needed	Dave Zarzycki	2013-03-25	1	-7/+20
*	Remove assert. There may be target-dependent attributes left.	Bill Wendling	2013-03-25	1	-1/+0
*	[arm load/store optimizer] When trying to merge a base update load/store, make	Chad Rosier	2013-03-25	1	-1/+1
*	[NVPTX] Fix handling of vector arguments	Justin Holewinski	2013-03-24	2	-7/+56
*	Clean up Sparc patterns.	Jakob Stoklund Olesen	2013-03-24	1	-5/+5
*	Give Sparc instruction patterns direct types instead of register classes.	Jakob Stoklund Olesen	2013-03-24	1	-81/+68
*	PPC ZERO register needs a register number of 0.	Hal Finkel	2013-03-23	1	-0/+1
*	Note in PPCFunctionInfo VRSAVE spills	Hal Finkel	2013-03-23	4	-14/+34
*	MCize the bcl instruction in PPCAsmPrinter	Hal Finkel	2013-03-23	1	-4/+5
*	Use direct types in Sparc def : Pat patterns.	Jakob Stoklund Olesen	2013-03-23	1	-10/+10
*	Cleanup some unused reg. scavenger parameters in PPCRegisterInfo	Hal Finkel	2013-03-23	2	-33/+19
*	Remove dead PPC LR spilling code	Hal Finkel	2013-03-23	1	-30/+8
*	Allow the register scavenger to spill multiple registers	Hal Finkel	2013-03-22	7	-7/+7
*	Hexagon: Add and enable memops setbit, clrbit, &,\|,+,- for byte, short, and w...	Jyotsna Verma	2013-03-22	5	-494/+483
*	Remove ABI-duplicated call instruction patterns.	Ulrich Weigand	2013-03-22	8	-148/+71
*	Rename memrr ptrreg and offreg components.	Ulrich Weigand	2013-03-22	2	-22/+22
*	Fix swapped BasePtr and Offset in pre-inc memory addresses.	Ulrich Weigand	2013-03-22	4	-20/+40
*	Tighten iaddroff ComplexPattern.	Ulrich Weigand	2013-03-22	1	-4/+4
*	Remove the xaddroff ComplexPattern.	Ulrich Weigand	2013-03-22	3	-31/+18
*	R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsics	Michel Danzer	2013-03-22	4	-15/+5
*	Fix the invalid opcode for Mips branch instructions in the assembler	Jack Carter	2013-03-22	1	-4/+6
*	This patch that enables the Mips assembler to use symbols for offset for inst...	Jack Carter	2013-03-22	2	-17/+154
*	Remove the G8RC_NOX0_and_GPRC_NOR0 PPC register class	Hal Finkel	2013-03-21	3	-7/+12
*	Fix a register-class comparison bug in PPCCTRLoops	Hal Finkel	2013-03-21	3	-19/+1
*	This patch enables the Mips .set directive to define aliases	Jack Carter	2013-03-21	1	-6/+93
*	Implement builtin_{setjmp/longjmp} on PPC	Hal Finkel	2013-03-21	9	-0/+367
*	Add support for spilling VRSAVE on PPC	Hal Finkel	2013-03-21	4	-1/+106
*	Correct PPC FRAMEADDR lowering using a pseudo-register	Hal Finkel	2013-03-21	5	-9/+50
*	Avoid NEON SP-FP unless unsafe-math or Darwin	Renato Golin	2013-03-21	4	-9/+23
*	Add a WriteMicrocoded for ancient microcoded instructions.	Jakob Stoklund Olesen	2013-03-21	2	-0/+7
*	Model prefetches and barriers as loads.	Jakob Stoklund Olesen	2013-03-20	1	-1/+4
*	Add a catch-all WriteSystem SchedWrite type.	Jakob Stoklund Olesen	2013-03-20	3	-1/+28
*	Annotate the remaining SSE MOV instructions.	Jakob Stoklund Olesen	2013-03-20	1	-25/+45
*	Annotate SSE horizontal and integer instructions.	Jakob Stoklund Olesen	2013-03-20	1	-16/+26