| Commit message (Expand) | Author | Age | Files | Lines |
* | add a case | Chris Lattner | 2005-10-18 | 1 | -0/+3 |
* | Do the right thing and enable 64 bit regs under the control of a subtarget | Nate Begeman | 2005-10-18 | 3 | -8/+10 |
* | First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is | Nate Begeman | 2005-10-18 | 9 | -88/+154 |
* | More PPC32 -> PPC changes, as well as merging some classes that were | Nate Begeman | 2005-10-16 | 20 | -170/+152 |
* | Remove some dead code now that the dag combiner exists. | Nate Begeman | 2005-10-15 | 1 | -15/+0 |
* | Remove some dead code: the ORI/ORIS cases are autogen'd. This makes | Chris Lattner | 2005-10-15 | 1 | -42/+1 |
* | prune #includes | Chris Lattner | 2005-10-15 | 2 | -3/+2 |
* | These instructions are now autogenerated | Chris Lattner | 2005-10-15 | 1 | -34/+0 |
* | Add a pattern for FSQRTS | Chris Lattner | 2005-10-15 | 1 | -1/+1 |
* | remove dead code | Chris Lattner | 2005-10-15 | 1 | -8/+3 |
* | remove broken SRA/rlwimi case | Chris Lattner | 2005-10-15 | 1 | -11/+2 |
* | Rename PPC32*.h to PPC*.h | Chris Lattner | 2005-10-14 | 12 | -17/+16 |
* | Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo | Chris Lattner | 2005-10-14 | 5 | -45/+22 |
* | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 15 | -19/+19 |
* | Rename PowerPCInstrBuilder.h -> PPC* | Chris Lattner | 2005-10-14 | 3 | -3/+3 |
* | Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine | Chris Lattner | 2005-10-14 | 4 | -49/+24 |
* | Rename PowerPC*.td -> PPC*.td | Chris Lattner | 2005-10-14 | 2 | -4/+4 |
* | These are dead | Chris Lattner | 2005-10-14 | 2 | -74/+0 |
* | Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td | Chris Lattner | 2005-10-14 | 9 | -32/+70 |
* | Like the comment says... | Chris Lattner | 2005-10-14 | 1 | -6/+0 |
* | Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions | Chris Lattner | 2005-10-14 | 6 | -87/+11 |
* | Properly split f32 and f64 into separate register classes for scalar sse fp | Nate Begeman | 2005-10-14 | 5 | -79/+78 |
* | Remove an unnecsesary file. PPC32 and PPC64 share architected registers. | Nate Begeman | 2005-10-14 | 4 | -52/+38 |
* | add the integer truncate/extension operations | Chris Lattner | 2005-10-14 | 1 | -3/+14 |
* | These are now autogenerated | Chris Lattner | 2005-10-14 | 1 | -12/+0 |
* | Add patterns for FP round/extend | Chris Lattner | 2005-10-14 | 1 | -2/+2 |
* | add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend... | Chris Lattner | 2005-10-14 | 1 | -0/+13 |
* | These definitions have been moved to common code. | Chris Lattner | 2005-10-10 | 1 | -199/+0 |
* | Pull DAG ISel generation nodes out of the PowerPC backend to where they | Chris Lattner | 2005-10-10 | 2 | -89/+216 |
* | This seems useful from the original patch that added the function. If there ... | Andrew Lenharth | 2005-10-09 | 2 | -0/+21 |
* | Disable formation of rlwinm instructions from SRA bases. This fixes | Chris Lattner | 2005-10-09 | 1 | -2/+2 |
* | Remove another unused file. Preparing for the great "enable i64 on ppc32" | Nate Begeman | 2005-10-08 | 1 | -35/+0 |
* | Remove a file that is no longer used | Nate Begeman | 2005-10-08 | 1 | -46/+0 |
* | When preselecting, favor things that have low depth to select first. This | Chris Lattner | 2005-10-07 | 1 | -5/+8 |
* | Fix a CQ regression from my patch to split F32/F64 into seperate register | Chris Lattner | 2005-10-07 | 1 | -1/+2 |
* | Fix CodeGen/Generic/bool-to-double.ll | Chris Lattner | 2005-10-07 | 1 | -0/+3 |
* | Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes. | Chris Lattner | 2005-10-06 | 1 | -106/+111 |
* | Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes | Chris Lattner | 2005-10-06 | 1 | -115/+117 |
* | Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes | Chris Lattner | 2005-10-06 | 1 | -58/+65 |
* | Add a recursive-iterative hybrid stage to attempt to reduce stack space, this | Chris Lattner | 2005-10-06 | 1 | -45/+94 |
* | This is suppose to work now | Andrew Lenharth | 2005-10-06 | 2 | -1/+2 |
* | remove VAX compatibility instruction, we will never use this | Andrew Lenharth | 2005-10-06 | 1 | -2/+0 |
* | silence some warnings | Chris Lattner | 2005-10-05 | 2 | -2/+2 |
* | Add a forward def | Chris Lattner | 2005-10-04 | 1 | -1/+2 |
* | Speed up the asm printer a lot by not printing formatted LLVM asm output | Chris Lattner | 2005-10-03 | 1 | -9/+3 |
* | silence some warnings | Chris Lattner | 2005-10-02 | 1 | -3/+2 |
* | silence a warning | Chris Lattner | 2005-10-02 | 1 | -1/+1 |
* | add patterns for float binops and fma ops | Chris Lattner | 2005-10-02 | 1 | -8/+12 |
* | Sort the cpu and features table, so that the alpha backend doesn't fail EVERY | Chris Lattner | 2005-10-02 | 1 | -2/+2 |
* | another solution to the fsel issue. Instead of having 4 variants, just force | Chris Lattner | 2005-10-02 | 3 | -32/+25 |