| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | "mov[zs]x (mem), GR16" are not ambiguous: the mem | Chris Lattner | 2010-11-01 | 1 | -0/+6 |
| * | Implement enough of the missing instalias support to get | Chris Lattner | 2010-11-01 | 2 | -3/+33 |
| * | make the asm matcher emitter reject instructions that have comments | Chris Lattner | 2010-11-01 | 1 | -2/+2 |
| * | reject instructions that contain a \n in their asmstring. Mark | Chris Lattner | 2010-11-01 | 2 | -8/+13 |
| * | fix the !eq operator in tblgen to return a bit instead of an int. | Chris Lattner | 2010-10-31 | 2 | -0/+6 |
| * | two changes: make the asmmatcher generator ignore ARM pseudos properly, | Chris Lattner | 2010-10-31 | 4 | -9/+19 |
| * | reapply r117858 with apparent editor malfunction fixed (somehow I | Chris Lattner | 2010-10-31 | 5 | -11/+21 |
| * | revert r117858 while I check out a failure I missed. | Chris Lattner | 2010-10-31 | 5 | -21/+11 |
| * | the asm matcher can't handle operands with modifiers (like ${foo:bar}). | Chris Lattner | 2010-10-31 | 5 | -11/+21 |
| * | sketch out the planned instruction alias mechanism, add some comments about | Chris Lattner | 2010-10-31 | 1 | -0/+14 |
| * | Factorize the duplicated logic for choosing the right argument | Duncan Sands | 2010-10-31 | 4 | -56/+36 |
| * | Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86, | Duncan Sands | 2010-10-31 | 1 | -16/+1 |
| * | Make sure we have a legal type (and simple) before continuing. | Eric Christopher | 2010-10-30 | 1 | -1/+4 |
| * | Resolve a terrible hack in tblgen: instead of hardcoding | Chris Lattner | 2010-10-30 | 1 | -2/+2 |
| * | Implement (and document!) support for MnemonicAlias's to have Requires | Chris Lattner | 2010-10-30 | 2 | -14/+20 |
| * | really zap alias. | Chris Lattner | 2010-10-30 | 1 | -1/+0 |
| * | move fcompi alias to .td file and zap some useless code. | Chris Lattner | 2010-10-30 | 2 | -11/+1 |
| * | move rep aliases to td file | Chris Lattner | 2010-10-30 | 2 | -5/+7 |
| * | move sal aliases to .td file. | Chris Lattner | 2010-10-30 | 2 | -5/+5 |
| * | fix an encoding mismatch where "sal %eax, 1" was not using the short encoding | Chris Lattner | 2010-10-30 | 1 | -1/+1 |
| * | move a bunch more aliases from .cpp -> .td file. | Chris Lattner | 2010-10-30 | 2 | -22/+27 |
| * | move cmov aliases to .td file. | Chris Lattner | 2010-10-30 | 2 | -49/+25 |
| * | move setcc and jcc aliases from .cpp to .td | Chris Lattner | 2010-10-30 | 2 | -14/+28 |
| * | move some code. | Chris Lattner | 2010-10-30 | 1 | -33/+35 |
| * | implement (and document!) the first kind of MC assembler alias, which | Chris Lattner | 2010-10-30 | 2 | -15/+23 |
| * | Add FIXME. | Jim Grosbach | 2010-10-30 | 1 | -0/+2 |
| * | Clean up comments. | Jim Grosbach | 2010-10-30 | 1 | -1/+5 |
| * | Tidy up. | Jim Grosbach | 2010-10-30 | 1 | -1/+1 |
| * | stay out of the reserved namespace | Chris Lattner | 2010-10-30 | 1 | -6/+6 |
| * | simplify this code. | Chris Lattner | 2010-10-30 | 1 | -8/+4 |
| * | split MaybeParseRegister into its two logical uses, eliminating malloc+free t... | Chris Lattner | 2010-10-30 | 1 | -35/+38 |
| * | Avoid re-evaluating MI.getNumOperands() every iteration of the loop. | Jim Grosbach | 2010-10-30 | 1 | -1/+1 |
| * | Overhaul memory barriers in the ARM backend. Radar 8601999. | Bob Wilson | 2010-10-30 | 5 | -131/+61 |
| * | Encode the register list operands for ARM mode LDM/STM instructions. | Jim Grosbach | 2010-10-30 | 4 | -0/+23 |
| * | Some instructions end with an "ls" prefix, but it doesn't indicate that they are | Bill Wendling | 2010-10-29 | 1 | -3/+9 |
| * | Remove hard tab characters. | Jim Grosbach | 2010-10-29 | 1 | -3/+3 |
| * | 80 column fix. | Jim Grosbach | 2010-10-29 | 1 | -2/+2 |
| * | trailing whitespace | Jim Grosbach | 2010-10-29 | 1 | -2/+2 |
| * | s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand | Jim Grosbach | 2010-10-29 | 3 | -3/+3 |
| * | Fix fpscr <-> GPR latency info. | Evan Cheng | 2010-10-29 | 3 | -4/+12 |
| * | add FIXME | Jim Grosbach | 2010-10-29 | 1 | -0/+5 |
| * | Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in | Jim Grosbach | 2010-10-29 | 4 | -45/+32 |
| * | Handle comparison values we already have - this fixes the consumer-typeset | Eric Christopher | 2010-10-29 | 1 | -4/+65 |
| * | ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need to | Jim Grosbach | 2010-10-29 | 1 | -55/+0 |
| * | Fix typo. | Jim Grosbach | 2010-10-29 | 1 | -1/+1 |
| * | ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj pseudo... | Jim Grosbach | 2010-10-29 | 2 | -20/+25 |
| * | ARM mode LDREX*/STREX* binary encodings. | Jim Grosbach | 2010-10-29 | 2 | -18/+28 |
| * | Encoding information for ARM conditional move instructions. | Jim Grosbach | 2010-10-29 | 1 | -19/+35 |
| * | Avoiding overly aggressive latency scheduling. If the two nodes share an | Evan Cheng | 2010-10-29 | 1 | -2/+7 |
| * | - Don't schedule nodes with only MVT::Flag and MVT::Other values for latency. | Evan Cheng | 2010-10-29 | 1 | -3/+7 |
