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* Because we promote SSE logical ops and loads to v2i64, we often end up generateEvan Cheng2007-07-201-11/+27
* Oops. These stores actually produce results.Evan Cheng2007-07-202-9/+9
* Fix custom lowering of SSE FXOR.Evan Cheng2007-07-191-10/+19
* Fix patterns so we isel the xorps, etc. for floating pt logical SSE ops. DAG ...Evan Cheng2007-07-191-12/+12
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-1929-2510/+2629
* Only adjust esp around calls in presence of alloca.Evan Cheng2007-07-191-1/+1
* Only adjust esp around calls in presence of alloca.Evan Cheng2007-07-193-50/+12
* Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if pre...Evan Cheng2007-07-181-13/+19
* Implement initial memory alignment awareness for SSE instructions. Vector loadsDan Gohman2007-07-181-59/+126
* It's not necessary to do rounding for alloca operations when the requestedDan Gohman2007-07-18240-0/+85965
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