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* Implement aarch64 neon instruction set AdvSIMD (Across).Jiangning Liu2013-10-052-0/+144
* [Sparc] Use correct alignment while loading/storing fp128 values.Venkatraman Govindaraju2013-10-051-4/+13
* [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with...Venkatraman Govindaraju2013-10-051-1/+1
* [Sparc] Correct the floating point conditional code mapping in GetOppositeBra...Venkatraman Govindaraju2013-10-041-8/+8
* forgot to remove this file as wellJack Carter2013-10-041-53/+0
* reverting per requestJack Carter2013-10-044-42/+4
* Support tblockaddr for static compilation in Mips16.Reed Kotler2013-10-041-1/+4
* [MC][AsmParser] Hook for post assembly file processingJack Carter2013-10-045-4/+95
* [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasingAkira Hatanaka2013-10-041-0/+5
* ARM: optimizeSelect has to consider the previous register classMatthias Braun2013-10-041-4/+9
* ARM: do not add a regmask for TAILJUMPsMatthias Braun2013-10-041-16/+18
* ARM: preserve undef flag in pseudo instruction expandersMatthias Braun2013-10-041-19/+14
* Implement aarch64 neon instruction set AdvSIMD (3V elem).Jiangning Liu2013-10-046-53/+937
* AVX-512: Fixed encoding of VMOVQ instruction.Elena Demikhovsky2013-10-031-3/+3
* [ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.Amara Emerson2013-10-037-78/+126
* Replace C++ style comment with a C style comment to satisfy some of the build...Craig Topper2013-10-031-1/+1
* Remove comma from the end of an enum.Craig Topper2013-10-031-1/+1
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-035-125/+238
* Add patterns for selecting TBM instructions from logical operations. Patch fr...Craig Topper2013-10-032-32/+98
* R600: Add a ldptr intrinsic to support MSAA.Vincent Lejeune2013-10-023-1/+10
* AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 targetElena Demikhovsky2013-10-022-8/+5
* AVX-512: Added TB prefix to all instructions without prefixes,Elena Demikhovsky2013-10-022-20/+18
* R600: add a pass that merges clauses.Vincent Lejeune2013-10-017-2/+232
* R600: Put PRED_X instruction in its own clauseVincent Lejeune2013-10-011-0/+8
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-015-9/+19
* [SystemZ] Add comparisons of high words and memoryRichard Sandiford2013-10-013-2/+30
* [SystemZ] Add comparisons of large immediates using high wordsRichard Sandiford2013-10-012-2/+20
* [SystemZ] Add immediate addition involving high wordsRichard Sandiford2013-10-014-2/+76
* [SystemZ] Extend test-under-mask support to high GR32sRichard Sandiford2013-10-014-8/+27
* [SystemZ] Extend 32-bit RISBG optimizations to high wordsRichard Sandiford2013-10-011-8/+16
* [SystemZ] Extend pseudo conditional 8- and 16-bit stores to high wordsRichard Sandiford2013-10-012-6/+22
* ARM: support interrupt attributeTim Northover2013-10-018-21/+148
* [SystemZ] Optimize 32-bit FPR<->GPR moves for z196 and aboveRichard Sandiford2013-10-011-7/+18
* [SystemZ] Allow integer AND involving high wordsRichard Sandiford2013-10-015-63/+107
* [SystemZ] Allow integer XOR involving high wordsRichard Sandiford2013-10-014-5/+15
* Remove several unused variables.Rafael Espindola2013-10-012-4/+0
* [SystemZ] Allow integer OR involving high wordsRichard Sandiford2013-10-014-13/+41
* [SystemZ] Allow integer insertions with a high-word destinationRichard Sandiford2013-10-014-2/+43
* [SystemZ] Allow selects with a high-word destinationRichard Sandiford2013-10-012-2/+4
* [SystemZ] Add patterns to load a constant into a high word (IIHF)Richard Sandiford2013-10-017-5/+59
* [ARM] Remove an unused function from the disassembler.Joey Gouly2013-10-011-11/+0
* Test commit. Updated comment.Matheus Almeida2013-10-011-1/+1
* [SystemZ] Add register zero extensions involving at least one high wordRichard Sandiford2013-10-013-2/+29
* [ARM] Introduce the 'sevl' instruction in ARMv8.Joey Gouly2013-10-015-29/+22
* [SystemZ] Add truncating high-word stores (STCH and STHH)Richard Sandiford2013-10-012-4/+24
* [SystemZ] Add zero-extending high-word loads (LLCH and LLHH)Richard Sandiford2013-10-012-2/+22
* [SystemZ] Add sign-extending high-word loads (LBH and LHH)Richard Sandiford2013-10-012-2/+22
* [SystemZ] Use upper words of GR64s for codegenRichard Sandiford2013-10-0110-13/+184
* [SystemZ] Reapply: Add definitions of LFH and STFHRichard Sandiford2013-10-011-0/+4
* [mips][msa] Added support for matching mod_[us] from normal IR (i.e. not intr...Daniel Sanders2013-10-012-9/+23
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