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directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7485 91177308-0d34-0410-b5e6-96231b3b80d8
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Note that some generated operators (like &, | or ^) may
not be supported by the assembler -- but if they've got
this far, it's better to generate them and let the assembler decide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7476 91177308-0d34-0410-b5e6-96231b3b80d8
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than machine register size), not just the second operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7475 91177308-0d34-0410-b5e6-96231b3b80d8
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since it is *necessary* for correct code generation. Only optional
transformations belong in the PreOpts pass (which needs to be renamed
from PreSelection to PreOpts).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7474 91177308-0d34-0410-b5e6-96231b3b80d8
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Add new RegisterInfo class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7469 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7460 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7455 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7454 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7453 91177308-0d34-0410-b5e6-96231b3b80d8
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.; so I have changed the basic block markers to start with .L. I also
broke up a >80char line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7452 91177308-0d34-0410-b5e6-96231b3b80d8
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longjmp() (and does not include setjmp.h).
This is to fix some problems on Sparc while non-local jumps are still
unimplemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7449 91177308-0d34-0410-b5e6-96231b3b80d8
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Make the register classes optionally take code fragments for allocation_order_*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7441 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7437 91177308-0d34-0410-b5e6-96231b3b80d8
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ordinary (primitive) types since ConstantExprs may be of primitive type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7418 91177308-0d34-0410-b5e6-96231b3b80d8
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it's currently not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7416 91177308-0d34-0410-b5e6-96231b3b80d8
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implementation
for a target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7415 91177308-0d34-0410-b5e6-96231b3b80d8
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have changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7414 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7413 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7405 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7404 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7403 91177308-0d34-0410-b5e6-96231b3b80d8
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* Enabled STXFSR instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7400 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7399 91177308-0d34-0410-b5e6-96231b3b80d8
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in ConvertConstantToIntType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7395 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7394 91177308-0d34-0410-b5e6-96231b3b80d8
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which were wrong (particularly, '\a' for '\007').
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7393 91177308-0d34-0410-b5e6-96231b3b80d8
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that depends on machine register size.
Moved insertCallerSavingCode() to PhyRegAlloc and
moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all
machine independent. Remove several dead functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7392 91177308-0d34-0410-b5e6-96231b3b80d8
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immed. field. Moved insertCallerSavingCode() to PhyRegAlloc: it is
now machine independent. Remove all uses of PhyRegAlloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7391 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetInstrInfo::ConvertConstantToIntType().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7390 91177308-0d34-0410-b5e6-96231b3b80d8
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spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
2. Bug fix: Delete the delay slot instr, not the branch instr, when
moving delay slot instr. out!!!!
3. Move code to insert caller-saves moved here from SparcRegInfo:
it is now machine-independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7389 91177308-0d34-0410-b5e6-96231b3b80d8
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be recomputed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7388 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7386 91177308-0d34-0410-b5e6-96231b3b80d8
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machine-independent.
Fix problem with using branch operand reg. as temp. reg. when
spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7385 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of assert()ing
* Fixed a nasty bug where '07' was used instead of register 'o7'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7382 91177308-0d34-0410-b5e6-96231b3b80d8
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value types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7377 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7357 91177308-0d34-0410-b5e6-96231b3b80d8
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what value type it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7356 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7350 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7348 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7347 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7345 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7344 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7343 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7342 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7341 91177308-0d34-0410-b5e6-96231b3b80d8
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Single and FP double reg types (which share the same reg class).
Now all methods marking/finding unused regs consider the regType
within the reg class, and SparcFloatRegClass specializes this code.
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7334 91177308-0d34-0410-b5e6-96231b3b80d8
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causing a nasty array bound error later.
2. Fix silly typo causing logical shift of unsigned long to use
SRL instead of SRLX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7330 91177308-0d34-0410-b5e6-96231b3b80d8
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info (since multiple reg types may share the same reg class).
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7329 91177308-0d34-0410-b5e6-96231b3b80d8
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found to consider regType info (since multiple reg types may share
the same reg class, e.g., single and double on Sparc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8
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