aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target
Commit message (Expand)AuthorAgeFilesLines
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-0126-28/+156
* Fix off-by-one error.Jim Grosbach2011-07-011-1/+1
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-0127-51/+85
* Pseudo-ize t2MOVCC[ri].Jim Grosbach2011-07-014-55/+18
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-015-23/+70
* Add support for the 'j' immediate constraint. This is conditionalized onEric Christopher2011-07-011-0/+9
* Add support for the ARM 't' register constraint. And another testcaseEric Christopher2011-07-011-0/+5
* We'll return a null RC by default if we can't match.Eric Christopher2011-07-011-2/+1
* Add support for the 'x' constraint.Eric Christopher2011-07-011-0/+9
* Capitalize the unsigned part of the initializer.Eric Christopher2011-06-301-1/+1
* Rename Pair to RCPair lacking any better naming ideas.Eric Christopher2011-06-301-10/+10
* Use the correct registers on X86_64.Bill Wendling2011-06-301-4/+4
* Fix a problem with fast-isel return values introduced in r134018.Jakob Stoklund Olesen2011-06-301-2/+3
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-309-86/+26
* Add support for the 'h' constraint.Eric Christopher2011-06-302-1/+10
* Add target a target hook to get the register number used by the compact unwindBill Wendling2011-06-302-0/+19
* Add a convenience typedef for std::pair<unsigned, const TargetRegisterClass*>.Eric Christopher2011-06-301-7/+8
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-308-51/+60
* Tweak error messages to match GCC. Should fix gcc.target/i386/pr30848.cJakob Stoklund Olesen2011-06-301-3/+3
* Pseudo-ize the Thumb tTPsoft instruction.Jim Grosbach2011-06-303-24/+7
* Pseudo-ize the t2LDMIA_RET instruction.Jim Grosbach2011-06-302-19/+12
* Pseudo-ize the Thumb tPOP_RET instruction.Jim Grosbach2011-06-302-9/+10
* Kill dead code.Jim Grosbach2011-06-301-1/+0
* Size reducing SP adjusting t2ADDri needs to check predication.Jim Grosbach2011-06-301-1/+4
* Fix ARMSubtarget feature parsing.Evan Cheng2011-06-301-10/+7
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-3056-145/+210
* Recognize the xstorerng alias for VIA PadLock's xstore instruction.Joerg Sonnenberger2011-06-301-0/+2
* Make sure we use the correct register class here since we'll need toEric Christopher2011-06-301-1/+2
* Fix a small thinko for constant i64 lock/orq optimization where weEric Christopher2011-06-301-2/+4
* Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach2011-06-296-113/+55
* Always adjust the stack pointer immediately after the call.Jakob Stoklund Olesen2011-06-291-0/+7
* In the ARM global merging pass, allow extraneous alignment specifiers. This passCameron Zwarich2011-06-291-2/+4
* Remove getRegClassForInlineAsmConstraint from the ARM port.Eric Christopher2011-06-292-59/+15
* Remove todo.Eric Christopher2011-06-291-2/+0
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-295-36/+8
* Add a TODO for the Alpha port inline asm constraints.Eric Christopher2011-06-291-0/+2
* Move Alpha from getRegClassForInlineAsmConstraint toEric Christopher2011-06-292-32/+14
* Update comment for getRegForInlineAsmConstraint for Mips.Eric Christopher2011-06-291-3/+3
* Move the Blackfin port away from getRegClassForInlineAsmConstraint byEric Christopher2011-06-293-29/+22
* Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO commentEric Christopher2011-06-292-33/+7
* Remove getRegClassForInlineAsmConstraint for Mips.Eric Christopher2011-06-292-48/+3
* Remove getRegClassForInlineAsmConstraint from sparc.Eric Christopher2011-06-292-24/+0
* Move XCore from getRegClassForInlineAsmConstraint toEric Christopher2011-06-292-17/+14
* Use getRegForInlineAsmConstraint instead of custom defining regclassesEric Christopher2011-06-292-56/+24
* Fix CMake build.NAKAMURA Takumi2011-06-291-1/+0
* Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)...Evan Cheng2011-06-298-398/+8
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-2828-59/+58
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-2813-25/+13
* Add MCInstrInfo registeration machinery.Evan Cheng2011-06-281-0/+6
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-2862-87/+112
generated by cgit v1.1 at 2025-02-19 08:08:12 +0000