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* [XCore] Fix handling of functions where only the LR is spilled.Richard Osborne2013-05-091-27/+30
* [mips] Add instruction selection pattern for (seteq $LHS, 0).Akira Hatanaka2013-05-081-0/+2
* Remove unused isLegalAddressImmediate() method.Roman Divacky2013-05-082-21/+0
* [PowerPC] Fix regression in generating @ha/@l relocsUlrich Weigand2013-05-081-1/+10
* Fix handling of anonymous aggregate parameters for powerpc*-apple-darwin8.Bill Schmidt2013-05-081-4/+4
* For r181148: fixed warning 'enumeral and non-enumeral type in conditional exp...Stepan Dyatkovskiy2013-05-081-1/+1
* PPCInstrInfo::optimizeCompareInstr should not optimize FP comparesHal Finkel2013-05-081-18/+11
* Corrected Atom latencies for SSE SQRT instructions.Preston Gurd2013-05-073-19/+36
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-077-2/+199
* Cleanup PPCInstrInfo::optimizeCompareInstrHal Finkel2013-05-071-14/+10
* Reverting r181331.Jyotsna Verma2013-05-076-196/+3
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-076-3/+196
* Hexagon: Set accessSize and addrMode on all load/store instructions.Jyotsna Verma2013-05-074-68/+125
* Re-enable AVX detection on x64 platforms.Michael Kuperstein2013-05-071-1/+2
* [SystemZ] Fix InitMCCodeGenInfo callRichard Sandiford2013-05-071-2/+2
* R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard2013-05-062-1/+14
* R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard2013-05-061-1/+1
* R600/SI: Add intrinsic for texture image loadingTom Stellard2013-05-063-10/+46
* R600/SI: Add pattern for uint_to_fpTom Stellard2013-05-061-1/+3
* R600/SI: Add patterns for integer maxima / minimaTom Stellard2013-05-061-4/+12
* R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard2013-05-061-1/+3
* Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek2013-05-066-17/+79
* Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek2013-05-061-29/+34
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-066-407/+307
* Make references to HexagonTargetMachine "const".Krzysztof Parzyszek2013-05-066-25/+26
* R600: Remove dead code from the CodeEmitter v2Tom Stellard2013-05-063-400/+64
* R600: Emit config values in register / value pairsTom Stellard2013-05-062-3/+55
* R600: Stop emitting the instruction type byte before each instructionTom Stellard2013-05-061-33/+2
* R600: Emit ISA for CALL_FS_* instructionsTom Stellard2013-05-061-1/+0
* [SystemZ] Add back endUlrich Weigand2013-05-0662-1/+10763
* [PowerPC] Fix memory corruption in AsmParserUlrich Weigand2013-05-061-7/+7
* ARM AnalyzeBranch should conservatively return true when it sees a predicatedEvan Cheng2013-05-051-3/+9
* [XCore] Add LDAPB instructions.Richard Osborne2013-05-051-3/+13
* [XCore] Update LDAP to use pcrel_imm.Richard Osborne2013-05-051-3/+3
* [XCore] Rename calltarget -> pcrel_imm.Richard Osborne2013-05-051-6/+6
* [XCore] Add BLRB instructions.Richard Osborne2013-05-051-0/+7
* [XCore] Remove '-' from back branch asm syntax.Richard Osborne2013-05-052-6/+18
* For ARM backend, fixed "byval" attribute support.Stepan Dyatkovskiy2013-05-052-33/+104
* Remove a recently redundant transform from X86ISelLowering.David Majnemer2013-05-051-11/+0
* Add ArrayRef constructor from None, and do the cleanups that this constructor...Dmitri Gribenko2013-05-052-4/+4
* whitespaceNadav Rotem2013-05-041-2/+2
* Fix an odd comment.Nadav Rotem2013-05-041-2/+1
* AArch64: enable MCJIT and tests now that everything passes.Tim Northover2013-05-041-1/+1
* AArch64: implement first relocation required for MCJITTim Northover2013-05-041-0/+6
* Build system changes to enable MCJIT on AArch64Tim Northover2013-05-041-1/+1
* Fix buildbot failure on 64 bit linux due to std::max() having differentRichard Osborne2013-05-041-1/+1
* [XCore] Remove unused operand type.Richard Osborne2013-05-041-1/+0
* [XCore] Make use of the target independent global address offset folding.Richard Osborne2013-05-046-98/+41
* [XCore] Simplify code that checks for an aligned base plus a constant.Richard Osborne2013-05-042-81/+56
* [XCore] Move lowering of thread local storage to a separate pass.Richard Osborne2013-05-046-55/+158
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