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* Oops. Didn't mean to check in a quick hack.Evan Cheng2007-04-171-8/+16
* dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.llChris Lattner2007-04-171-1/+1
* Change getAllocatableSet() so it returns allocatable registers for a specific...Evan Cheng2007-04-171-4/+7
* Add commentAnton Korobeynikov2007-04-171-0/+9
* add a noteChris Lattner2007-04-171-0/+43
* rename X86FunctionInfo to X86MachineFunctionInfo to match the header fileChris Lattner2007-04-177-21/+23
* Implemented correct stack probing on mingw/cygwin for dynamic alloca's.Anton Korobeynikov2007-04-175-7/+70
* Use this nifty Constraints thing and fix the inverted conditional movesAndrew Lenharth2007-04-172-17/+21
* SSE4 is apparently public now.Chris Lattner2007-04-171-0/+2
* In the event that some really old non-Intel or -AMD CPU is encountered...Jeff Cohen2007-04-161-2/+5
* Before assuming that the original code didn't work for Athlon64, the person whoJeff Cohen2007-04-161-6/+2
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-1614-251/+261
* For PR1336:Reid Spencer2007-04-161-1/+1
* add a noteChris Lattner2007-04-141-0/+18
* Silence VC++ warning.Jeff Cohen2007-04-131-1/+1
* arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.Chris Lattner2007-04-131-1/+5
* Implement review feedback .. don't double search a set.Reid Spencer2007-04-121-3/+1
* Provide support for intrinsics that lower themselves to a function body.Reid Spencer2007-04-121-2/+32
* Implement Thread Local Storage (TLS) in CBackend.Lauro Ramos Venancio2007-04-121-17/+27
* Fix mmx paddq, add support for the 'y' register class, though it isn't tested.Chris Lattner2007-04-121-1/+5
* Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-04-111-6/+8
* Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-ne...Chris Lattner2007-04-111-3/+3
* doneChris Lattner2007-04-111-28/+0
* For PR1146:Reid Spencer2007-04-112-10/+10
* Add support for our first SSSE3 instruction "pmulhrsw".Bill Wendling2007-04-107-10/+54
* new micro optznChris Lattner2007-04-101-0/+30
* restore support for negative stridesChris Lattner2007-04-101-3/+5
* remove dead target hooksChris Lattner2007-04-092-98/+49
* remove some dead hooksChris Lattner2007-04-092-49/+0
* remove some dead target hooks, subsumed by isLegalAddressingModeChris Lattner2007-04-094-58/+0
* Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2Chris Lattner2007-04-091-0/+3
* When the number of elements is zero, don't malloc 32GB on 64-bit systems.Jeff Cohen2007-04-091-1/+1
* For PR1146:Reid Spencer2007-04-092-10/+17
* move a bunch of register constraints from being handled byChris Lattner2007-04-091-42/+36
* implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 valuesChris Lattner2007-04-091-2/+2
* implement CodeGen/X86/inline-asm-x-scalar.llChris Lattner2007-04-091-1/+15
* Squelch a warning about mismatch between sign of constant and sign of returnReid Spencer2007-04-041-1/+1
* Implement inline asm modifier P.Evan Cheng2007-04-041-0/+1
* Typo.Evan Cheng2007-04-041-1/+1
* Adding more MMX instructions.Bill Wendling2007-04-032-64/+128
* make a new missing features sectionChris Lattner2007-04-031-2/+6
* Remove unused constant pool entries.Evan Cheng2007-04-031-32/+60
* UpdatedBill Wendling2007-04-031-0/+4
* Fixed a bug that causes codegen of noop like add r0, r0, #0.Evan Cheng2007-04-031-1/+1
* Starting implementation of the ELF32 ABI specification of varargs handling.Nicolas Geoffray2007-04-032-9/+177
* The PPC64 ELF ABI is "intended to use the same structure layout and calling c...Nicolas Geoffray2007-04-036-92/+46
* Addition to the previous commit for getCalleeSavedRegClasses:Nicolas Geoffray2007-04-031-2/+4
* The ELF ABI specifies F1-F8 registers as argument registers for double, notNicolas Geoffray2007-04-035-10/+12
* Inverted logic.Evan Cheng2007-04-031-1/+1
* Changed to new MMX_ recipes.Bill Wendling2007-04-031-3/+3