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* Fix a potential bug.Evan Cheng2006-11-101-1/+1
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-101-1/+1
* add an initial cut at preinc loads for ppc32. This is broken for ppc64Chris Lattner2006-11-103-22/+88
* add note about ugly codegen with preincChris Lattner2006-11-101-0/+29
* Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands...Evan Cheng2006-11-103-34/+50
* Fixing PR990: http://llvm.org/PR990.Anton Korobeynikov2006-11-101-6/+6
* add a note about viterbiChris Lattner2006-11-101-0/+6
* PPC supports i32 / i64 pre-inc load / store.Evan Cheng2006-11-091-0/+6
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-091-12/+12
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-092-2/+2
* implement load effective address similar to the alpha backendRafael Espindola2006-11-094-82/+15
* Remove M_2_ADDR_FLAG.Evan Cheng2006-11-092-5/+9
* Added indexed store node and patfrag's.Evan Cheng2006-11-081-11/+131
* Use movl+xchgl instead of pushl+popl.Evan Cheng2006-11-081-3/+2
* Match tblegen changes.Evan Cheng2006-11-084-40/+51
* initial implementation of addressing mode 2Rafael Espindola2006-11-084-15/+72
* For PR950:Reid Spencer2006-11-082-34/+48
* Refactor all the addressing mode selection stuff into the isel loweringChris Lattner2006-11-083-229/+325
* correct the (currently unused) pattern for lwzu.Chris Lattner2006-11-081-2/+8
* Fixed a bug which causes x86 be to incorrectly matchEvan Cheng2006-11-073-5/+30
* add a note from viterbiChris Lattner2006-11-071-0/+29
* fix encoding of BLRChris Lattner2006-11-071-2/+2
* add a noteChris Lattner2006-11-061-0/+16
* Unbreak VC++ build.Jeff Cohen2006-11-052-2/+4
* Fix a bug in the last patch and convert to && instead of & for logical expr.Reid Spencer2006-11-052-4/+4
* Implement the -enabled-cbe-printf-a feature.Reid Spencer2006-11-052-4/+4
* encode BLR predicate info for the JITChris Lattner2006-11-043-15/+29
* Go through all kinds of trouble to mark 'blr' as having a predicate operandChris Lattner2006-11-043-12/+62
* Describe PPC predicates, which are a pair of CR# and condition.Chris Lattner2006-11-031-0/+4
* initial steps to getting the predicate on PPC::BLR right.Chris Lattner2006-11-031-0/+11
* remove dead varChris Lattner2006-11-031-1/+0
* remove dead/redundant varsChris Lattner2006-11-034-9/+0
* remove redundant/dead varsChris Lattner2006-11-031-2/+0
* remove dead varsChris Lattner2006-11-031-3/+0
* add a noteChris Lattner2006-11-031-0/+6
* revert previous patchRafael Espindola2006-11-031-2/+0
* Dead code.Evan Cheng2006-11-031-4/+0
* add createCFGSimplificationPass to ARMTargetMachine::addInstSelectorRafael Espindola2006-11-031-0/+2
* silence warningChris Lattner2006-11-031-13/+0
* silence warnings.Chris Lattner2006-11-033-12/+1
* silence warningChris Lattner2006-11-031-6/+0
* silence warningsChris Lattner2006-11-031-1/+1
* Make CBackend -pedantic clean.Reid Spencer2006-11-031-2/+1
* fix a bug reid noticedChris Lattner2006-11-021-1/+1
* For PR786:Reid Spencer2006-11-0217-41/+11
* move ARMCondCodeToString to ARMAsmPrinter.cppRafael Espindola2006-11-023-23/+21
* fix 2006-11-01-vastart.llAndrew Lenharth2006-11-022-3/+5
* For PR950:Reid Spencer2006-11-022-20/+56
* Implement the getRegForInlineAsmConstraint method for PPC. With recentChris Lattner2006-11-022-56/+29
* RenameEvan Cheng2006-11-011-1/+3
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