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* implement a todo: change a map into a vectorChris Lattner2006-11-171-6/+6
* fix typoChris Lattner2006-11-171-2/+2
* implicit_def_vrrc doesn't generate code.Chris Lattner2006-11-161-31/+31
* Correct instructions for moving data between GR64 and SSE registers; also cor...Evan Cheng2006-11-163-6/+34
* Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.Evan Cheng2006-11-161-3/+1
* This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey2006-11-169-150/+409
* fix a regression that I introduced. stdu should scale the offset by 4Chris Lattner2006-11-162-2/+11
* Align stubs on 4 byte boundary. This fixes 447.dealII.Evan Cheng2006-11-161-2/+2
* add a statisticChris Lattner2006-11-161-1/+6
* fix broken encodingChris Lattner2006-11-161-1/+1
* add ppc64 r+i stores with update.Chris Lattner2006-11-162-40/+72
* add patterns for ppc32 preinc stores. ppc64 next.Chris Lattner2006-11-162-7/+22
* switch these back to the 'bad old way'Chris Lattner2006-11-161-20/+20
* Fix ppc64 epilog bug.Chris Lattner2006-11-151-1/+1
* Stop using isTwoAddress, switching to operand constraints instead.Chris Lattner2006-11-153-38/+54
* add a new field needed by the code emitter generator.Chris Lattner2006-11-151-0/+4
* Properly transfer kill / dead info.Evan Cheng2006-11-156-41/+82
* Kill / dead info has been moved to MI's.Evan Cheng2006-11-151-18/+11
* commuteInstruction should propagate kill / dead info.Evan Cheng2006-11-151-0/+10
* fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memriChris Lattner2006-11-154-52/+58
* Simplify IntrinsicLowering and clarify that it is only for use by theChris Lattner2006-11-152-2/+2
* Remove unneeded forward declsChris Lattner2006-11-152-2/+0
* Fix the PPC regressions last nightChris Lattner2006-11-152-7/+7
* Switch loads over to use memri as the operand instead of a reg/imm operandChris Lattner2006-11-152-43/+60
* Revert. This wasn't meant to be checked in.Evan Cheng2006-11-141-11/+18
* group load and store instructions together. No functionality change.Chris Lattner2006-11-141-99/+110
* Fix predicates for unindexed stores so they don't accidentally match indexedChris Lattner2006-11-141-33/+39
* Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 callsChris Lattner2006-11-145-38/+107
* remove a ton of custom selection logic no longer neededChris Lattner2006-11-141-145/+7
* it would be nice of ctlz were lowered to bsf etc.Chris Lattner2006-11-141-0/+9
* lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead ofChris Lattner2006-11-141-3/+5
* add a noteChris Lattner2006-11-141-0/+16
* minor tweaks, reject vector preinc.Chris Lattner2006-11-141-4/+9
* Matches MachineInstr changes.Evan Cheng2006-11-1315-102/+107
* teach the g5 hazard recognizer about update loads. This fixesChris Lattner2006-11-131-11/+10
* Cute example from Chris Lattner.Nick Lewycky2006-11-131-0/+40
* Make sure stack link is set in 64-bit.Jim Laskey2006-11-111-3/+9
* implement proper PPC64 prolog/epilog codegen.Chris Lattner2006-11-112-30/+81
* Running with frame pointers prevented debugging, external probes andJim Laskey2006-11-111-2/+5
* Add implicit use / def operands to created MI's.Evan Cheng2006-11-113-10/+8
* Add all implicit defs to FP_REG_KILL mi.Evan Cheng2006-11-111-1/+6
* allow the offset of a preinc'd load to be the low-part of a global. ThisChris Lattner2006-11-111-1/+2
* Mark operands as symbol lo instead of imm32 so that they print lo(x) aroundChris Lattner2006-11-112-11/+11
* ppc64 doesn't have lwau, don't attempt to form it.Chris Lattner2006-11-111-3/+9
* implement preinc support for r+i loads on ppc64Chris Lattner2006-11-104-17/+71
* Add a note.Evan Cheng2006-11-101-0/+6
* These are done.Evan Cheng2006-11-102-69/+0
* Don't dag combine floating point select to max and min intrinsics. ThoseEvan Cheng2006-11-103-59/+21
* Fix a bug in SelectScalarSSELoad. Since the load is wrapped in aEvan Cheng2006-11-101-0/+1
* dform 8/9 are identical to dform 1Chris Lattner2006-11-102-15/+6
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