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* Pass the llvm IR pointer value and offset to the constructor ofAkira Hatanaka2012-03-271-9/+13
* Fix bug in LowerConstantPool. Akira Hatanaka2012-03-271-1/+1
* Add T9 to the list of live-in registers of the entry basic block. Akira Hatanaka2012-03-271-0/+2
* Retrieve and add the offset of a symbol in applyFixup rather than retrieve andAkira Hatanaka2012-03-272-67/+67
* Define function MipsGetSymAndOffset which returns a fixup's symbol and theAkira Hatanaka2012-03-271-0/+30
* Rewrite computation of Value in adjustFixupValue so that the upper 48-bits areAkira Hatanaka2012-03-271-1/+1
* Reserve hardware registers.Akira Hatanaka2012-03-271-0/+4
* ARM has a peephole optimization which looks for a def / use pair. The defEvan Cheng2012-03-261-0/+19
* Prune some includes and forward declarations.Craig Topper2012-03-265-8/+4
* Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.hCraig Topper2012-03-267-10/+2
* Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions.Craig Topper2012-03-258-18/+12
* Prune some includes and forward declarations.Craig Topper2012-03-253-0/+3
* Fix small-integer VAARG on SVR4 ABI PPC64.Hal Finkel2012-03-241-5/+17
* PTX: Fix predicate logic bugJustin Holewinski2012-03-242-21/+36
* ARM tidy up ARMConstantIsland.cpp.Jim Grosbach2012-03-231-156/+158
* Include cstdio in a few place that depended on getting it transitively throug...Benjamin Kramer2012-03-231-1/+2
* Move ftostr into its last user (cppbackend) and simplify it a bit.Benjamin Kramer2012-03-232-0/+13
* Remove the C backend.Eric Christopher2012-03-2310-3775/+1
* Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga2012-03-221-1/+81
* Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga2012-03-222-5/+35
* Added soft fail cases for the disassembler when decoding MUL instructions on ...Silviu Baranga2012-03-221-5/+6
* Remove some unnecessary forward declarations.Craig Topper2012-03-227-12/+0
* PPC::DBG_VALUE must use Reg+Imm frame-index elimination even for large offset...Hal Finkel2012-03-221-1/+2
* Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby2012-03-211-0/+19
* Put Is64BitMemOperand into !defined(NDEBUG) for now.Joerg Sonnenberger2012-03-211-0/+2
* Use a signed value for this enum to avoid spuriuos warnings from gcc.Benjamin Kramer2012-03-212-2/+2
* Fix generation of the address size override prefix. Add assertions forJoerg Sonnenberger2012-03-211-5/+51
* Add typecast to silence -Wswitch warning introduced by r153153.Craig Topper2012-03-211-1/+1
* Spacing fixes and using 'unsigned' instead of 'int' to index to select shuffl...Craig Topper2012-03-211-28/+29
* Incremental big endian patch by Jack Carter.Akira Hatanaka2012-03-212-13/+30
* [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu toChad Rosier2012-03-201-0/+17
* Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and ...Evan Cheng2012-03-202-96/+56
* remove unused variableMatt Beaumont-Gay2012-03-201-1/+0
* [avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to giveChad Rosier2012-03-201-1/+1
* Require a base pointer for stack realignment when SP may vary dynamically.Bob Wilson2012-03-201-2/+3
* Remove some redundant checks.Bob Wilson2012-03-202-3/+2
* Whitespace.Chad Rosier2012-03-201-1/+1
* [avx] Move the vextractf128 patterns closer to the vextractf128 def. RemoveChad Rosier2012-03-201-28/+26
* Fix assembling ARM vst2 instructions with double-spaced registers.Kevin Enderby2012-03-201-1/+1
* ARM non-scattered MachO relocations for movw/movt.Jim Grosbach2012-03-201-22/+58
* [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.Chad Rosier2012-03-201-3/+3
* The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga2012-03-202-4/+10
* Test Commit - add a newlineRichard Barton2012-03-201-0/+1
* Remove code that prevented lowering shuffles if they are used by load and the...Craig Topper2012-03-201-92/+111
* Factor out target shuffle mask decoding from getShuffleScalarElt and use a Sm...Craig Topper2012-03-204-96/+95
* fix a build failure with libc++Chris Lattner2012-03-191-0/+1
* ARM branch relaxation for unconditional t1 branches.Jim Grosbach2012-03-191-0/+11
* ARM assembly, accept optional '#' on lane index number.Jim Grosbach2012-03-191-0/+6
* Perform mul combine when multiplying wiht negative constants.Anton Korobeynikov2012-03-191-18/+48
* This patch adds X86 instruction itineraries for non-pseudo opcodes inPreston Gurd2012-03-193-51/+82