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* Add selection of RegOp2MemOpTable3 to canFoldMemoryOperandCraig Topper2012-08-311-0/+2
* Fix PR12359Michael Liao2012-08-311-3/+5
* The instruction DINS may be transformed into DINSU or DEXTM dependingJack Carter2012-08-314-23/+31
* Add a comment to explain what's really going on.Chad Rosier2012-08-311-0/+6
* The ConvertToMCInst() function can't fail, so remove the now dead Match_Conve...Chad Rosier2012-08-313-8/+0
* Mark FMA3 instructions as commutable so that the operands to the multiply par...Craig Topper2012-08-311-0/+4
* Add support for converting llvm.fma to fma4 instructions.Craig Topper2012-08-313-36/+76
* Clean up AddedComplexity further after adding UseSSExMichael Liao2012-08-311-17/+13
* Fix a couple of typos in EmitAtomic.Jakob Stoklund Olesen2012-08-311-2/+2
* X86: Fix encoding of 'movd %xmm0, %rax'Jim Grosbach2012-08-311-1/+1
* With the fix in r162954/162955 every cvt function returns true. Thus, haveChad Rosier2012-08-311-64/+42
* Fix for r162954. Return the Error.Chad Rosier2012-08-301-2/+2
* Move a check to the validateInstruction() function where it more properly bel...Chad Rosier2012-08-301-11/+13
* Typo.Chad Rosier2012-08-301-1/+1
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-305-122/+158
* PPCISelLowering.cpp: Fix r162725.NAKAMURA Takumi2012-08-301-1/+5
* PPCISelLowering.cpp: Whitespace.NAKAMURA Takumi2012-08-301-1/+1
* Add support for moving pure S-register to NEON pipeline if desiredTim Northover2012-08-301-2/+71
* Only perform DAG combine on FMAs of legal types.Craig Topper2012-08-301-0/+4
* Fix PR13727Michael Liao2012-08-301-3/+7
* Rename hasVolatileMemoryRef() to hasOrderedMemoryRef().Jakob Stoklund Olesen2012-08-291-2/+2
* Reserve space for the mandatory traceback fields on PPC64.Hal Finkel2012-08-291-4/+8
* Refactor setExecutionDomain to be clearer about what it's doing and more robust.Tim Northover2012-08-291-45/+53
* Make helper function static.Benjamin Kramer2012-08-291-1/+1
* Make MemoryBuiltins aware of TargetLibraryInfo.Benjamin Kramer2012-08-291-1/+20
* Convert FMA4 patterns to use target specific nodes instead of intrinsics to a...Craig Topper2012-08-293-38/+36
* Cleanup sloppy code. Jakob's review.Andrew Trick2012-08-291-4/+3
* [arm-fast-isel] Add support for ARM PIC.Jush Lu2012-08-291-6/+16
* Fix ARM vector copies of overlapping register tuples.Andrew Trick2012-08-291-0/+13
* cleanupAndrew Trick2012-08-291-21/+19
* Typo.Chad Rosier2012-08-281-1/+1
* Add comments on the literal value used.Michael Liao2012-08-281-1/+1
* The instruction DEXT may be transformed into DEXTU or DEXTM dependingJack Carter2012-08-284-3/+54
* Explicitly update the number of nodes to be traversedMichael Liao2012-08-281-1/+1
* Some instructions are passed to the assembler to beJack Carter2012-08-281-20/+24
* Emit word of zeroes after the last instruction as a start of the mandatoryRoman Divacky2012-08-281-0/+15
* Follow-up patch to r162731.Akira Hatanaka2012-08-281-8/+9
* Add PPC Freescale e500mc and e5500 subtargets.Hal Finkel2012-08-288-2/+609
* The commutative flag is already correctly set within the multiclass. If we setBill Wendling2012-08-281-1/+1
* Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.Craig Topper2012-08-283-18/+10
* Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.Craig Topper2012-08-283-31/+18
* Fix PR12312Michael Liao2012-08-281-10/+112
* Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ...Jakob Stoklund Olesen2012-08-286-169/+43
* Fix mips' long branch pass.Akira Hatanaka2012-08-281-105/+128
* Split several PPC instruction classes.Hal Finkel2012-08-289-102/+269
* Allow remat of LI on PPC.Hal Finkel2012-08-282-1/+3
* Eliminate redundant CR moves on PPC32.Hal Finkel2012-08-283-8/+34
* Optimize zext on PPC64.Hal Finkel2012-08-281-0/+9
* More missing mayLoad flags on AVX multiclasses.Jakob Stoklund Olesen2012-08-281-3/+3
* Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM.Jakob Stoklund Olesen2012-08-276-43/+169
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