| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | PR9030: Fix disassembly of ARM "mov pc, lr" instruction. | Bob Wilson | 2011-01-28 | 1 | -2/+2 |
| * | Fix PLD encoding. | Evan Cheng | 2011-01-27 | 1 | -2/+2 |
| * | Changed llvm-mc arm target to give an error if .syntax divided is used. Since | Kevin Enderby | 2011-01-27 | 1 | -1/+1 |
| * | [AVX] Clean up the code to configure target lowering for AVX. Specify | David Greene | 2011-01-27 | 1 | -73/+47 |
| * | Introduce virtual ParseRegister method in TargetAsmParser. | Roman Divacky | 2011-01-27 | 3 | -6/+19 |
| * | Use the incoming VT not the VT of where we're trying to store to determine | Eric Christopher | 2011-01-27 | 1 | -2/+2 |
| * | lib/Target/X86/X86ISelDAGToDAG.cpp: __main should be WINCALL64 on Win64. | NAKAMURA Takumi | 2011-01-27 | 1 | -1/+1 |
| * | Add support for printing out floating point values from the ARM assembly | Bill Wendling | 2011-01-26 | 1 | -2/+27 |
| * | [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a | David Greene | 2011-01-26 | 2 | -1/+23 |
| * | [AVX] Support EXTRACT_SUBVECTOR on x86. This provides a default | David Greene | 2011-01-26 | 2 | -0/+13 |
| * | fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions | Bruno Cardoso Lopes | 2011-01-26 | 1 | -0/+1 |
| * | Add needed braces. | Bill Wendling | 2011-01-26 | 1 | -1/+2 |
| * | Target/X86: Tweak win64's tailcall. | NAKAMURA Takumi | 2011-01-26 | 7 | -12/+49 |
| * | Fix whitespace. | NAKAMURA Takumi | 2011-01-26 | 6 | -132/+129 |
| * | lib/Target/X86/X86RegisterInfo.cpp: Fix whitespace. | NAKAMURA Takumi | 2011-01-26 | 1 | -3/+3 |
| * | lib/Target/X86/X86RegisterInfo.cpp: Fix a typo in comment. | NAKAMURA Takumi | 2011-01-26 | 1 | -1/+1 |
| * | Revert 124230. It was causing test failures. | Bill Wendling | 2011-01-25 | 1 | -4/+2 |
| * | The floating point value is encoded in its binary form as an Imm. Convert it | Bill Wendling | 2011-01-25 | 1 | -2/+4 |
| * | Don't merge restore with tail call instruction. | Evan Cheng | 2011-01-25 | 1 | -1/+6 |
| * | Provide correct registers for EH stuff on ARM | Anton Korobeynikov | 2011-01-24 | 1 | -3/+4 |
| * | fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey! | Chris Lattner | 2011-01-24 | 1 | -0/+3 |
| * | this isn't a memset, we do convert dest[i] to one though :) | Chris Lattner | 2011-01-24 | 1 | -8/+0 |
| * | with recent work, we now optimize this into: | Chris Lattner | 2011-01-24 | 1 | -20/+0 |
| * | Add a memset loop that LoopIdiomRecognize doesn't recognize. | Anders Carlsson | 2011-01-23 | 1 | -0/+8 |
| * | Initialize MCNoExecStack. | Rafael Espindola | 2011-01-23 | 1 | -0/+1 |
| * | Add support for the --noexecstack option. | Rafael Espindola | 2011-01-23 | 4 | -7/+12 |
| * | Null initialize a few variables flagged by | Ted Kremenek | 2011-01-23 | 3 | -3/+3 |
| * | Delay the creation of eh_frame so that the user can change the defaults. | Rafael Espindola | 2011-01-23 | 1 | -1/+0 |
| * | Remove more duplicated code. | Rafael Espindola | 2011-01-23 | 5 | -21/+21 |
| * | Remove duplicated code. | Rafael Espindola | 2011-01-23 | 6 | -15/+21 |
| * | Pass sret arguments through the stack instead of through registers in Sparc b... | Venkatraman Govindaraju | 2011-01-22 | 3 | -4/+75 |
| * | Added ICC, FCC as uses of movcc instruction to generate correct code when -ma... | Venkatraman Govindaraju | 2011-01-22 | 1 | -42/+51 |
| * | Sparc backend: | Venkatraman Govindaraju | 2011-01-21 | 3 | -23/+28 |
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 | 9 | -75/+136 |
| * | Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm", | Bruno Cardoso Lopes | 2011-01-21 | 2 | -15/+24 |
| * | Implement support for byval arguments in Sparc backend. | Venkatraman Govindaraju | 2011-01-21 | 1 | -1/+31 |
| * | Convert -enable-sched-cycles and -enable-sched-hazard to -disable | Andrew Trick | 2011-01-21 | 1 | -9/+5 |
| * | Don't be overly aggressive with CSE of "ldr constantpool". If it's a pc-relative | Evan Cheng | 2011-01-20 | 1 | -5/+1 |
| * | Fix the encoding and parsing of clrex instruction | Bruno Cardoso Lopes | 2011-01-20 | 2 | -5/+9 |
| * | Change instruction names for consistency | Bruno Cardoso Lopes | 2011-01-20 | 1 | -4/+6 |
| * | Add cdp/cdp2 instructions for thumb/thumb2 | Bruno Cardoso Lopes | 2011-01-20 | 3 | -1/+51 |
| * | - Use a more appropriate name for Owen's ARM Parser isMCR hack since the same... | Bruno Cardoso Lopes | 2011-01-20 | 2 | -26/+60 |
| * | Add mcr*2 and mr*c2 support to thumb2 targets | Bruno Cardoso Lopes | 2011-01-20 | 2 | -0/+62 |
| * | Add mcr* and mr*c support to thumb targets | Bruno Cardoso Lopes | 2011-01-20 | 3 | -2/+68 |
| * | Allow sign-extending of i8 and i16 to i128 on SPU. | Kalle Raiskila | 2011-01-20 | 2 | -1/+7 |
| * | Refactor mcr* and mr*c instructions into classes with the same encoding. No f... | Bruno Cardoso Lopes | 2011-01-20 | 1 | -108/+46 |
| * | Correct itinerary entry for t2MOV_pic_ga_add_pc. | Evan Cheng | 2011-01-20 | 1 | -1/+1 |
| * | Sorry, several patches in one. | Evan Cheng | 2011-01-20 | 12 | -168/+275 |
| * | Sparc backend: Implements a delay slot filler that attempt to fill delay slots | Venkatraman Govindaraju | 2011-01-20 | 2 | -8/+225 |
| * | Fix the encoding of mrrc and mcrr family of instructions. Also add testcases ... | Bruno Cardoso Lopes | 2011-01-19 | 1 | -16/+16 |
