| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Thumb MUL assembly parsing for 3-operand form. | Jim Grosbach | 2011-11-10 | 1 | -7/+9 |
| * | build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler | Daniel Dunbar | 2011-11-10 | 1 | -1/+7 |
| * | When in ARM mode, LDRH/STRH require special handling of negative offsets. | Chad Rosier | 2011-11-10 | 1 | -1/+2 |
| * | ARM .thumb_func directive for quoted symbol names. | Jim Grosbach | 2011-11-10 | 1 | -3/+3 |
| * | ARM assembly parsing for LSR/LSL/ROR(immediate). | Jim Grosbach | 2011-11-10 | 2 | -6/+50 |
| * | ARM assembly parsing for ASR(immediate). | Jim Grosbach | 2011-11-10 | 3 | -7/+37 |
| * | build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for | Daniel Dunbar | 2011-11-10 | 4 | -6/+6 |
| * | AVX2: Add variable shift from memory. | Nadav Rotem | 2011-11-10 | 1 | -1/+24 |
| * | For immediate encodings of icmp, zero or sign extend first. Then | Chad Rosier | 2011-11-10 | 1 | -5/+5 |
| * | build/Make & CMake: Pass the appropriate --native-target and --enable-targets | Daniel Dunbar | 2011-11-10 | 1 | -2/+3 |
| * | llvm-build: Add --native-target and --enable-targets options, and add logic to | Daniel Dunbar | 2011-11-10 | 13 | -16/+16 |
| * | llvm-build: Change CBackend and CppBackend to not use library_name. This will | Daniel Dunbar | 2011-11-10 | 2 | -2/+0 |
| * | llvm-build: Add an explicit component type to represent targets. | Daniel Dunbar | 2011-11-10 | 12 | -12/+16 |
| * | Tidy up. | Jim Grosbach | 2011-11-10 | 1 | -12/+0 |
| * | Thumb2 assembly parsing STMDB w/ optional .w suffix. | Jim Grosbach | 2011-11-09 | 1 | -0/+6 |
| * | Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM. | Eli Friedman | 2011-11-09 | 1 | -1/+25 |
| * | The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12. | Chad Rosier | 2011-11-09 | 1 | -5/+13 |
| * | AVX2: Add patterns for variable shift operations | Nadav Rotem | 2011-11-09 | 2 | -0/+40 |
| * | Remove unnecessary include. | Devang Patel | 2011-11-09 | 2 | -2/+0 |
| * | Add AVX2 support for vselect of v32i8 | Nadav Rotem | 2011-11-09 | 2 | -0/+8 |
| * | Enable execution dependency fix pass for YMM registers when AVX2 is enabled. ... | Craig Topper | 2011-11-09 | 2 | -4/+20 |
| * | Add instruction selection for AVX2 integer comparisons. | Craig Topper | 2011-11-09 | 2 | -8/+43 |
| * | Add AVX2 instruction lowering for add, sub, and mul. | Craig Topper | 2011-11-09 | 1 | -24/+81 |
| * | Add support for encoding immediates in icmp and fcmp. Hopefully, this will | Chad Rosier | 2011-11-09 | 1 | -12/+64 |
| * | Hide cpu name checking in ARMSubtarget. | Evan Cheng | 2011-11-09 | 2 | -1/+2 |
| * | Properly handle Mips MC relocations and lower cpload and cprestore macros to ... | Bruno Cardoso Lopes | 2011-11-08 | 4 | -45/+191 |
| * | Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with l... | Evan Cheng | 2011-11-08 | 1 | -3/+9 |
| * | ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this. | Chad Rosier | 2011-11-08 | 1 | -39/+39 |
| * | Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. | Lang Hames | 2011-11-08 | 1 | -0/+7 |
| * | Added invariant field to the DAG.getLoad method and changed all calls. | Pete Cooper | 2011-11-08 | 12 | -130/+155 |
| * | This patch handles unaligned loads and stores in Mips JIT. Mips backend | Bruno Cardoso Lopes | 2011-11-08 | 2 | -6/+148 |
| * | PPCInstrInfo.cpp: Fix one "unused" warning. | NAKAMURA Takumi | 2011-11-08 | 1 | -0/+1 |
| * | Make sure to mark vector extload's as expand on ARM. Fixes PR11319. | Eli Friedman | 2011-11-08 | 1 | -9/+11 |
| * | Add x86 isel logic and patterns to match movlps from clang generated IR for _... | Evan Cheng | 2011-11-08 | 2 | -6/+11 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 | 2 | -1/+9 |
| * | Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention... | Chad Rosier | 2011-11-07 | 1 | -1/+1 |
| * | Various Mips64 floating point instruction patterns. | Akira Hatanaka | 2011-11-07 | 1 | -3/+18 |
| * | Add definition of the base class for floating point comparison instructions | Akira Hatanaka | 2011-11-07 | 1 | -8/+8 |
| * | Add code needed for copying between 64-bit integer and floating pointer | Akira Hatanaka | 2011-11-07 | 1 | -0/+6 |
| * | Add definitions of 64-bit instructions which move data between integer and | Akira Hatanaka | 2011-11-07 | 1 | -0/+8 |
| * | Simplify some uses of utohexstr. | Benjamin Kramer | 2011-11-07 | 2 | -4/+3 |
| * | Simplify code. No functionality change. | Benjamin Kramer | 2011-11-07 | 1 | -155/+91 |
| * | Expand V_SET0 to xorps by default. | Jakob Stoklund Olesen | 2011-11-07 | 1 | -1/+1 |
| * | Add definition of 64-bit load upper immediate. | Akira Hatanaka | 2011-11-07 | 2 | -3/+4 |
| * | Include RegSaveAreaSize in the computation of stack size. | Akira Hatanaka | 2011-11-07 | 1 | -0/+1 |
| * | Define functions that get or set the size of area on callee's stack frame which | Akira Hatanaka | 2011-11-07 | 1 | -1/+10 |
| * | Use array_lengthof to compute the number of iterations of a loop. | Akira Hatanaka | 2011-11-07 | 1 | -6/+6 |
| * | Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted | Akira Hatanaka | 2011-11-07 | 1 | -2/+2 |
| * | Make the type of shift amount i32 in order to reduce the number of shift | Akira Hatanaka | 2011-11-07 | 3 | -5/+7 |
| * | Add 64-bit to 32-bit trunc pattern. | Akira Hatanaka | 2011-11-07 | 1 | -0/+5 |
