| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX | Bruno Cardoso Lopes | 2010-07-09 | 2 | -22/+17 |
| * | Fix the memoperand offsets in code generated for va_start. | Dan Gohman | 2010-07-09 | 1 | -3/+3 |
| * | have the mc lowering process handle a few tail call forms, lowering them to | Chris Lattner | 2010-07-09 | 3 | -13/+19 |
| * | Print "dregpair" NEON operands with a space between them, for readability and | Bob Wilson | 2010-07-09 | 1 | -1/+1 |
| * | Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting | Dan Gohman | 2010-07-09 | 5 | -70/+205 |
| * | Factor out x86 segment override prefix encoding, and also use it for VEX | Bruno Cardoso Lopes | 2010-07-09 | 1 | -18/+33 |
| * | reject pseudo instructions early in the encoder. | Chris Lattner | 2010-07-09 | 2 | -11/+5 |
| * | Remove trailing whitespaces from file | Bruno Cardoso Lopes | 2010-07-09 | 1 | -66/+66 |
| * | Change LEA to have 5 operands for its memory operand, just | Chris Lattner | 2010-07-08 | 15 | -160/+98 |
| * | add some long-overdue enums to refer to the parts of the 5-operand | Chris Lattner | 2010-07-08 | 6 | -44/+56 |
| * | Remember the VR64 register class | Jakob Stoklund Olesen | 2010-07-08 | 1 | -0/+2 |
| * | Rework segment prefix emission code to handle segments | Chris Lattner | 2010-07-08 | 1 | -47/+41 |
| * | introduce a new X86II::getMemoryOperandNo method, which | Chris Lattner | 2010-07-08 | 1 | -12/+71 |
| * | Switch SPU calling convention (function arguments) | Kalle Raiskila | 2010-07-08 | 4 | -118/+52 |
| * | Check for FiniteOnlyFPMath as well. | Evan Cheng | 2010-07-08 | 1 | -1/+1 |
| * | Teach the x86 floating point stackifier to handle COPY instructions. | Jakob Stoklund Olesen | 2010-07-08 | 1 | -1/+36 |
| * | Implement X86InstrInfo::copyPhysReg | Jakob Stoklund Olesen | 2010-07-08 | 2 | -0/+64 |
| * | The NEONPreAllocPass should never have to assign fixed registers anymore. | Bob Wilson | 2010-07-08 | 1 | -34/+1 |
| * | For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap the | Bob Wilson | 2010-07-08 | 1 | -2/+2 |
| * | Clean up a comment. | Bob Wilson | 2010-07-08 | 1 | -5/+5 |
| * | Convert EXTRACT_SUBREG to COPY when emitting machine instrs. | Jakob Stoklund Olesen | 2010-07-08 | 3 | -10/+8 |
| * | Remove references to INSERT_SUBREG after de-SSA. | Jakob Stoklund Olesen | 2010-07-08 | 1 | -8/+6 |
| * | Teach instcombine to transform | Benjamin Kramer | 2010-07-08 | 1 | -11/+0 |
| * | A slight reworking of the custom patterns for x86-64 tpoff codegen and | Eric Christopher | 2010-07-08 | 1 | -9/+11 |
| * | r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. | Evan Cheng | 2010-07-08 | 1 | -3/+5 |
| * | Optimize some vfp comparisons to integer ones. This patch implements the simp... | Evan Cheng | 2010-07-08 | 2 | -10/+48 |
| * | Changes to ARM tail calls, mostly cosmetic. | Dale Johannesen | 2010-07-08 | 3 | -8/+20 |
| * | Revert 107840 107839 107813 107804 107800 107797 107791. | Dan Gohman | 2010-07-08 | 5 | -193/+69 |
| * | fix copies to/from GR8_ABCD_H even more | Jakob Stoklund Olesen | 2010-07-07 | 1 | -1/+3 |
| * | grammar | Jim Grosbach | 2010-07-07 | 1 | -1/+1 |
| * | Handle cases where the post-RA scheduler may move instructions between the | Jim Grosbach | 2010-07-07 | 1 | -6/+21 |
| * | finish up support for callw: PR7195 | Chris Lattner | 2010-07-07 | 1 | -1/+1 |
| * | Implement the major chunk of PR7195: support for 'callw' | Chris Lattner | 2010-07-07 | 6 | -11/+36 |
| * | Add more assembly opcodes for SSE compare instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -8/+32 |
| * | Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument f... | Evan Cheng | 2010-07-07 | 6 | -9/+9 |
| * | Print undefined/unknown debug value as "undef". | Devang Patel | 2010-07-07 | 1 | -1/+6 |
| * | grammar and trailing whitespace | Jim Grosbach | 2010-07-07 | 1 | -6/+6 |
| * | Allow copies between GR8_ABCD_L and GR8_ABCD_H. | Jakob Stoklund Olesen | 2010-07-07 | 1 | -0/+3 |
| * | Implement bottom-up fast-isel. This has the advantage of not requiring | Dan Gohman | 2010-07-07 | 1 | -22/+42 |
| * | Add X86FastISel support for return statements. This entails refactoring | Dan Gohman | 2010-07-07 | 5 | -12/+78 |
| * | Add AVX AES instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -26/+70 |
| * | Give FunctionLoweringInfo an MBB member, avoiding the need to pass it | Dan Gohman | 2010-07-07 | 1 | -57/+95 |
| * | Simplify FastISel's constructor by giving it a FunctionLoweringInfo | Dan Gohman | 2010-07-07 | 3 | -71/+19 |
| * | Split the SDValue out of OutputArg so that SelectionDAG-independent | Dan Gohman | 2010-07-07 | 26 | -53/+125 |
| * | Add AVX SSE4.2 instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -114/+179 |
| * | Use only one multiclass to pinsrq instructions | Bruno Cardoso Lopes | 2010-07-07 | 2 | -38/+20 |
| * | Now that almost all SSE4.1 AVX instructions are added, move code around to mo... | Bruno Cardoso Lopes | 2010-07-07 | 2 | -361/+374 |
| * | Add AVX SSE4.1 insertps, ptest and movntdqa instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -18/+39 |
| * | Add AVX SSE4.1 extractps and pinsr instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -35/+67 |
| * | Also use REG_SEQUENCE for VTBX instructions. | Bob Wilson | 2010-07-07 | 2 | -24/+30 |
