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* Disable for now. This is pessimizing code.Evan Cheng2008-02-201-1/+1
* Add hidden option -x86-fold-and-in-test to test the effect the test / and fol...Evan Cheng2008-02-192-1/+7
* fix some byval problems in the cbe. Closes PR2065Andrew Lenharth2008-02-191-7/+5
* Don't fold and's into test instructions if they have multiple uses.Chris Lattner2008-02-191-6/+12
* Me not like duplicated comments.Evan Cheng2008-02-191-4/+4
* - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should c...Evan Cheng2008-02-184-55/+78
* Chris pointed out that it's not necessary to set i64 MUL to ExpandDan Gohman2008-02-181-12/+10
* upgrade some tests.Chris Lattner2008-02-181-39/+43
* Add a noteNate Begeman2008-02-181-0/+3
* Add a note about sext from i1 plus flags use.Chris Lattner2008-02-181-0/+52
* Don't mark scalar integer multiplication as Expand on x86, since x86Dan Gohman2008-02-181-5/+6
* move PR2053 to here.Chris Lattner2008-02-171-0/+12
* I cannot find a libgcc function for this builtin. Therefor expanding it to a...Andrew Lenharth2008-02-168-4/+18
* llvm.memory.barrier, and impl for x86 and alphaAndrew Lenharth2008-02-165-1/+38
* Handle \n's in value names for more targets. The asm printers Chris Lattner2008-02-153-13/+40
* If the llvm name contains an unprintable character, don't print it inChris Lattner2008-02-151-3/+15
* Cosmetics.Dale Johannesen2008-02-151-6/+3
* Remove warning about 64-bit code on processorDale Johannesen2008-02-152-10/+0
* nocona, core2 and penryn support 64 bit.Dale Johannesen2008-02-151-3/+3
* Rewrite tblgen handling of subtarget features soDale Johannesen2008-02-144-0/+4
* Fix single precision FP constants on SPU. They are actually legal,Nate Begeman2008-02-143-20/+9
* In TargetLowering::LowerCallTo, don't assert thatDuncan Sands2008-02-147-20/+35
* Change how FP immediates are handled. Nate Begeman2008-02-148-27/+21
* Move some useful operands up into the all-targets .tdNate Begeman2008-02-142-3/+3
* upgrade some entries, remove stuff that is done.Chris Lattner2008-02-142-134/+46
* the mid-level optimizer removes this stuff.Chris Lattner2008-02-141-26/+0
* this one is easy.Chris Lattner2008-02-141-1/+1
* This readme entry is done, testcase here: CodeGen/X86/zero-remat.llChris Lattner2008-02-141-14/+0
* Assigning an APInt to 0 with plain assignment gives it a one-bitDan Gohman2008-02-131-1/+1
* Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman2008-02-139-10/+10
* Enable exception handling int JITNicolas Geoffray2008-02-132-5/+23
* Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.Chris Lattner2008-02-131-0/+1
* don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. Chris Lattner2008-02-133-39/+17
* readme updatesNate Begeman2008-02-132-0/+20
* Make register scavenging happy by not using a reg (CR0) that isn't definedNate Begeman2008-02-131-1/+1
* commuteInstr() can now commute non-ssa machine instrs.Evan Cheng2008-02-132-0/+19
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-139-40/+38
* __DATA not __DATA__ is the right segment name on darwin.Dale Johannesen2008-02-122-2/+2
* Remove some dead codeNate Begeman2008-02-121-7/+3
* SSE4.1 64b integer insert/extract pattern supportNate Begeman2008-02-124-41/+73
* Revert r46916 PPCTargetAsmInfo.cpp.Evan Cheng2008-02-121-2/+2
* Only using x86-64 rip relative addressing in non-staic mode?Evan Cheng2008-02-121-4/+8
* Update comment.Evan Cheng2008-02-121-2/+2
* Unbreak various insert_vector_elt and extract_vector_elt tests in presence of...Evan Cheng2008-02-121-4/+4
* Stuff noticed while grepping codeNate Begeman2008-02-111-65/+7
* Enable SSE4 codegen and pattern matching.Nate Begeman2008-02-115-25/+242
* additional missing featureNate Begeman2008-02-111-0/+1
* xmm0 variable blendsNate Begeman2008-02-101-2/+27
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-1054-104/+114
* Match GCC's behaviour for these sections.Nick Lewycky2008-02-101-2/+2
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