| Commit message (Expand) | Author | Age | Files | Lines |
| * | Add MCObjectFileInfo and sink the MCSections initialization code from | Evan Cheng | 2011-07-20 | 3 | -31/+14 |
| * | X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, ... | NAKAMURA Takumi | 2011-07-20 | 1 | -1/+2 |
| * | Don't leak CodeGenInfos. | Benjamin Kramer | 2011-07-20 | 1 | -1/+3 |
| * | Change name of class. | Akira Hatanaka | 2011-07-20 | 1 | -23/+23 |
| * | Define classes for definitions of atomic instructions. | Akira Hatanaka | 2011-07-20 | 1 | -106/+42 |
| * | Lower memory barriers to sync instructions. | Akira Hatanaka | 2011-07-19 | 3 | -2/+28 |
| * | Tweak ARM assembly parsing and printing of MSR instruction. | Jim Grosbach | 2011-07-19 | 3 | -8/+19 |
| * | ARM assembly parsing of MRS instruction. | Jim Grosbach | 2011-07-19 | 2 | -7/+11 |
| * | Enhance the FixedLengthDecoder to be able to generate plausible-looking decod... | Owen Anderson | 2011-07-19 | 1 | -2/+11 |
| * | Change variable name. | Akira Hatanaka | 2011-07-19 | 1 | -3/+3 |
| * | ARM assembly parsing for MRC/MRC2/MRRC/MRRC2. | Jim Grosbach | 2011-07-19 | 2 | -9/+8 |
| * | Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or | Akira Hatanaka | 2011-07-19 | 1 | -13/+14 |
| * | Use descriptive variable names. | Akira Hatanaka | 2011-07-19 | 1 | -154/+177 |
| * | ARM assembly parsing for MOV (register). | Jim Grosbach | 2011-07-19 | 1 | -19/+21 |
| * | Tidy up. | Jim Grosbach | 2011-07-19 | 1 | -12/+8 |
| * | Tighten conditional for 'mov' cc_out. | Jim Grosbach | 2011-07-19 | 1 | -1/+2 |
| * | ARM assembly parsing for MOV (immediate). | Jim Grosbach | 2011-07-19 | 3 | -16/+63 |
| * | Remove unused code. | Jim Grosbach | 2011-07-19 | 1 | -54/+3 |
| * | Fix comments. | Akira Hatanaka | 2011-07-19 | 1 | -10/+10 |
| * | Remove redundant instructions. | Akira Hatanaka | 2011-07-19 | 1 | -16/+12 |
| * | Separate code that modifies control flow from code that adds instruction to | Akira Hatanaka | 2011-07-19 | 1 | -18/+18 |
| * | ARM range checking for so_imm operands in assembly parsing. | Jim Grosbach | 2011-07-19 | 2 | -0/+15 |
| * | Convert gep_type_begin and gep_type_end to use ArrayRef. | Jay Foad | 2011-07-19 | 1 | -1/+1 |
| * | Convert TargetData::getIndexedOffset to use ArrayRef. | Jay Foad | 2011-07-19 | 1 | -4/+5 |
| * | Add intrinsics for the zext / sext instructions. | Richard Osborne | 2011-07-19 | 1 | -7/+13 |
| * | Add intrinsics for the testct, testwct instructions. | Richard Osborne | 2011-07-19 | 1 | -1/+9 |
| * | Add intrinsics for the peek and endin instructions. | Richard Osborne | 2011-07-19 | 1 | -1/+8 |
| * | Introduce MCCodeGenInfo, which keeps information that can affect codegen | Evan Cheng | 2011-07-19 | 46 | -273/+371 |
| * | Make EmitAtomic functions return the correct MachineBasicBlocks so that | Akira Hatanaka | 2011-07-19 | 1 | -22/+28 |
| * | Do not insert instructions in reverse order. | Akira Hatanaka | 2011-07-19 | 1 | -14/+16 |
| * | Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple... | Owen Anderson | 2011-07-18 | 3 | -12/+40 |
| * | Eliminate TargetAsmInfo::getCompactUnwindEncoding. This get rid of the | Evan Cheng | 2011-07-18 | 1 | -3/+0 |
| * | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng | 2011-07-18 | 29 | -93/+78 |
| * | Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause ... | Owen Anderson | 2011-07-18 | 1 | -1/+1 |
| * | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 46 | -432/+341 |
| * | Do not treat atomic.load.sub differently than other atomic binary intrinsics. | Akira Hatanaka | 2011-07-18 | 1 | -12/+2 |
| * | Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from | Akira Hatanaka | 2011-07-18 | 3 | -85/+23 |
| * | Re-apply r135319 with a fix for the constant island pass. | Owen Anderson | 2011-07-18 | 3 | -48/+29 |
| * | Be more smart with VCVTSS2SD. Also place the patterns close to the | Bruno Cardoso Lopes | 2011-07-18 | 1 | -20/+10 |
| * | Add AVX 128-bit sqrt versions | Bruno Cardoso Lopes | 2011-07-18 | 1 | -0/+11 |
| * | Change destination register operands of SC instructions so that unique | Akira Hatanaka | 2011-07-18 | 1 | -8/+13 |
| * | Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previ... | Frits van Bommel | 2011-07-18 | 2 | -14/+14 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 36 | -231/+231 |
| * | Revert r135319 in an attempt to get to unbreak testers. | Owen Anderson | 2011-07-16 | 2 | -27/+48 |
| * | Add AVX 128-bit patterns for sint_to_fp | Bruno Cardoso Lopes | 2011-07-16 | 1 | -0/+20 |
| * | Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tB... | Owen Anderson | 2011-07-15 | 2 | -48/+27 |
| * | Fix a couple of things: | Bruno Cardoso Lopes | 2011-07-15 | 1 | -61/+52 |
| * | Add a few patterns for 256-bit bitcasts. No testcases now, they are | Bruno Cardoso Lopes | 2011-07-15 | 1 | -0/+9 |
| * | PR10370: Make sure we know how to relax push correctly on x86-64. | Eli Friedman | 2011-07-15 | 1 | -0/+3 |
| * | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson | 2011-07-15 | 5 | -19/+14 |