| Commit message (Expand) | Author | Age | Files | Lines |
* | Enable code placement optimization pass for ARM. | Evan Cheng | 2010-09-24 | 1 | -7/+1 |
* | We can't return SSE/MMX vectors if SSE is disabled. | Dale Johannesen | 2010-09-24 | 1 | -3/+5 |
* | Fix a potential null dereference bug. | Evan Cheng | 2010-09-24 | 1 | -4/+12 |
* | Revert r114703 and r114702, removing the isConditionalMove flag from instruct... | Owen Anderson | 2010-09-23 | 5 | -10/+10 |
* | Set alignment operand for NEON VST instructions. | Bob Wilson | 2010-09-23 | 1 | -14/+22 |
* | ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion | Jim Grosbach | 2010-09-23 | 1 | -0/+77 |
* | #+4 --> #4 for consistency with other asm output | Jim Grosbach | 2010-09-23 | 1 | -2/+2 |
* | Fix formatting of output .s code | Jim Grosbach | 2010-09-23 | 1 | -1/+1 |
* | Add isConditionalMove bits to X86 and ARM instructions. | Owen Anderson | 2010-09-23 | 5 | -10/+10 |
* | Set alignment operand for NEON VLD instructions. | Bob Wilson | 2010-09-23 | 1 | -0/+16 |
* | never mind. I can't read, apparently | Jim Grosbach | 2010-09-23 | 1 | -1/+1 |
* | Fix r114632. Return if the only terminator is an unconditional branch after t... | Evan Cheng | 2010-09-23 | 1 | -3/+5 |
* | Fix opcode value for the 'trap' instruction, keeping the type suffix on the | Jim Grosbach | 2010-09-23 | 1 | -1/+1 |
* | explicit 'unsigned long' on constant value. Hopefully make bots happier. | Jim Grosbach | 2010-09-23 | 1 | -1/+1 |
* | Unbreak build. Jim, please review. | Benjamin Kramer | 2010-09-23 | 1 | -4/+4 |
* | Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't | Jim Grosbach | 2010-09-23 | 3 | -6/+36 |
* | nuke unused var | Jim Grosbach | 2010-09-23 | 1 | -1/+0 |
* | If there are multiple unconditional branches terminating a block, eliminate all | Evan Cheng | 2010-09-23 | 1 | -1/+17 |
* | Add support for ELF PLT references for ARM MC asm printing. Adding a | Jim Grosbach | 2010-09-22 | 4 | -15/+45 |
* | Enable a few additional asserts in MC instruction lowering. | Jim Grosbach | 2010-09-22 | 1 | -9/+6 |
* | Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case. | Cameron Esfahani | 2010-09-22 | 1 | -2/+3 |
* | Change VDUPLANE DAG combiner to just return the result instead of calling | Bob Wilson | 2010-09-22 | 1 | -5/+3 |
* | Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one | Bob Wilson | 2010-09-22 | 1 | -28/+35 |
* | add FIXME | Jim Grosbach | 2010-09-22 | 1 | -0/+1 |
* | Temporarily work around new address lowering while I figure out what | Eric Christopher | 2010-09-22 | 1 | -1/+2 |
* | Remove a few commented out bits | Jim Grosbach | 2010-09-22 | 1 | -14/+0 |
* | Add PrintSpecial() handling for in ARM MC instruction printer. | Jim Grosbach | 2010-09-22 | 2 | -2/+9 |
* | Add MC instruction printer support for ARM and Thumb1 jump tables. | Jim Grosbach | 2010-09-22 | 1 | -3/+49 |
* | Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an | Bob Wilson | 2010-09-22 | 1 | -2/+3 |
* | Add MC instruction printer support for TB[BH] style thumb2 jump tables. | Jim Grosbach | 2010-09-22 | 1 | -24/+27 |
* | Clean up comment. | Jim Grosbach | 2010-09-22 | 1 | -4/+4 |
* | fix rdar://8456371 - Handle commutable instructions written backward. | Chris Lattner | 2010-09-22 | 1 | -0/+10 |
* | Fix an inconsistency in the x86 backend that led it to reject "calll foo" on | Chris Lattner | 2010-09-22 | 3 | -5/+15 |
* | fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8" | Chris Lattner | 2010-09-22 | 3 | -42/+27 |
* | add the missing aliases for fp stack cmovs, rdar://8456391 | Chris Lattner | 2010-09-22 | 1 | -0/+6 |
* | reimplement elf TLS support in terms of addressing modes, eliminating Segment... | Chris Lattner | 2010-09-22 | 4 | -58/+42 |
* | Fix rdar://8456364 - llvm-mc rejects '%CS' | Chris Lattner | 2010-09-22 | 1 | -8/+13 |
* | fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp' | Chris Lattner | 2010-09-22 | 1 | -0/+8 |
* | fix rdar://8456361 - llvm-mc rejects 'rep movsd' | Chris Lattner | 2010-09-22 | 1 | -0/+6 |
* | convert the last 4 X86ISD nodes that should have memoperands to have them. | Chris Lattner | 2010-09-22 | 4 | -41/+69 |
* | give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only | Chris Lattner | 2010-09-22 | 3 | -16/+21 |
* | give FP_TO_INT16_IN_MEM and friends a memoperand. They are only | Chris Lattner | 2010-09-22 | 4 | -22/+29 |
* | give VZEXT_LOAD a memory operand, it now works with segment registers. | Chris Lattner | 2010-09-22 | 5 | -13/+14 |
* | revert r114386 now that address modes work correctly, we get a nice | Chris Lattner | 2010-09-22 | 1 | -4/+0 |
* | give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256... | Chris Lattner | 2010-09-21 | 3 | -10/+11 |
* | OptimizeCompareInstr should avoid iterating pass the beginning of the MBB whe... | Evan Cheng | 2010-09-21 | 1 | -1/+6 |
* | Add start of support for MC instruction printer of ARM jump tables. Filling in | Jim Grosbach | 2010-09-21 | 2 | -0/+74 |
* | Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that ... | Owen Anderson | 2010-09-21 | 1 | -4/+0 |
* | reimplement support for GS and FS relative address space matching | Chris Lattner | 2010-09-21 | 3 | -57/+44 |
* | Reimplement r114460 in target-independent DAGCombine rather than target-depen... | Owen Anderson | 2010-09-21 | 2 | -23/+15 |