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* Enable code placement optimization pass for ARM.Evan Cheng2010-09-241-7/+1
* We can't return SSE/MMX vectors if SSE is disabled.Dale Johannesen2010-09-241-3/+5
* Fix a potential null dereference bug.Evan Cheng2010-09-241-4/+12
* Revert r114703 and r114702, removing the isConditionalMove flag from instruct...Owen Anderson2010-09-235-10/+10
* Set alignment operand for NEON VST instructions.Bob Wilson2010-09-231-14/+22
* ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansionJim Grosbach2010-09-231-0/+77
* #+4 --> #4 for consistency with other asm outputJim Grosbach2010-09-231-2/+2
* Fix formatting of output .s codeJim Grosbach2010-09-231-1/+1
* Add isConditionalMove bits to X86 and ARM instructions.Owen Anderson2010-09-235-10/+10
* Set alignment operand for NEON VLD instructions.Bob Wilson2010-09-231-0/+16
* never mind. I can't read, apparentlyJim Grosbach2010-09-231-1/+1
* Fix r114632. Return if the only terminator is an unconditional branch after t...Evan Cheng2010-09-231-3/+5
* Fix opcode value for the 'trap' instruction, keeping the type suffix on theJim Grosbach2010-09-231-1/+1
* explicit 'unsigned long' on constant value. Hopefully make bots happier.Jim Grosbach2010-09-231-1/+1
* Unbreak build. Jim, please review.Benjamin Kramer2010-09-231-4/+4
* Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don'tJim Grosbach2010-09-233-6/+36
* nuke unused varJim Grosbach2010-09-231-1/+0
* If there are multiple unconditional branches terminating a block, eliminate allEvan Cheng2010-09-231-1/+17
* Add support for ELF PLT references for ARM MC asm printing. Adding aJim Grosbach2010-09-224-15/+45
* Enable a few additional asserts in MC instruction lowering.Jim Grosbach2010-09-221-9/+6
* Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.Cameron Esfahani2010-09-221-2/+3
* Change VDUPLANE DAG combiner to just return the result instead of callingBob Wilson2010-09-221-5/+3
* Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing oneBob Wilson2010-09-221-28/+35
* add FIXMEJim Grosbach2010-09-221-0/+1
* Temporarily work around new address lowering while I figure out whatEric Christopher2010-09-221-1/+2
* Remove a few commented out bitsJim Grosbach2010-09-221-14/+0
* Add PrintSpecial() handling for in ARM MC instruction printer.Jim Grosbach2010-09-222-2/+9
* Add MC instruction printer support for ARM and Thumb1 jump tables.Jim Grosbach2010-09-221-3/+49
* Attempt to fix llvm-gcc build. It was crashing when building gcov.o for anBob Wilson2010-09-221-2/+3
* Add MC instruction printer support for TB[BH] style thumb2 jump tables.Jim Grosbach2010-09-221-24/+27
* Clean up comment.Jim Grosbach2010-09-221-4/+4
* fix rdar://8456371 - Handle commutable instructions written backward.Chris Lattner2010-09-221-0/+10
* Fix an inconsistency in the x86 backend that led it to reject "calll foo" onChris Lattner2010-09-223-5/+15
* fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"Chris Lattner2010-09-223-42/+27
* add the missing aliases for fp stack cmovs, rdar://8456391Chris Lattner2010-09-221-0/+6
* reimplement elf TLS support in terms of addressing modes, eliminating Segment...Chris Lattner2010-09-224-58/+42
* Fix rdar://8456364 - llvm-mc rejects '%CS'Chris Lattner2010-09-221-8/+13
* fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'Chris Lattner2010-09-221-0/+8
* fix rdar://8456361 - llvm-mc rejects 'rep movsd'Chris Lattner2010-09-221-0/+6
* convert the last 4 X86ISD nodes that should have memoperands to have them.Chris Lattner2010-09-224-41/+69
* give X86ISD::FNSTCW16m a memoperand, since it touches memory. It onlyChris Lattner2010-09-223-16/+21
* give FP_TO_INT16_IN_MEM and friends a memoperand. They are onlyChris Lattner2010-09-224-22/+29
* give VZEXT_LOAD a memory operand, it now works with segment registers.Chris Lattner2010-09-225-13/+14
* revert r114386 now that address modes work correctly, we get a niceChris Lattner2010-09-221-4/+0
* give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256...Chris Lattner2010-09-213-10/+11
* OptimizeCompareInstr should avoid iterating pass the beginning of the MBB whe...Evan Cheng2010-09-211-1/+6
* Add start of support for MC instruction printer of ARM jump tables. Filling inJim Grosbach2010-09-212-0/+74
* Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that ...Owen Anderson2010-09-211-4/+0
* reimplement support for GS and FS relative address space matchingChris Lattner2010-09-213-57/+44
* Reimplement r114460 in target-independent DAGCombine rather than target-depen...Owen Anderson2010-09-212-23/+15