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* ARM handle :lower16: and :upper16: after a '#' prefix.Jim Grosbach2012-04-161-13/+17
* Fix incorrect atomics codegen introduced in r154705, and extend test to catch...Richard Smith2012-04-161-1/+1
* Remove unused variableDavid Blaikie2012-04-161-1/+0
* ARM assembly two-operand forms for VRSHL.Jim Grosbach2012-04-161-1/+36
* Do not add offset in applyFixup. This has already been accounted for in Value. Akira Hatanaka2012-04-161-4/+2
* ARM two-operand aliases for VRHADD instructions.Jim Grosbach2012-04-161-0/+32
* Hexagon V5 (Floating Point) Support.Sirish Pande2012-04-1619-1468/+3365
* Replace vpermd/vpermps intrinic patterns with custom lowering to target speci...Craig Topper2012-04-162-18/+14
* Change type profile for vpermv back to using operand type for the mask argume...Craig Topper2012-04-162-5/+5
* Flip the arguments when converting vpermd/vpermps intrinsics into instruction...Craig Topper2012-04-161-3/+3
* Merge vpermps/vpermd and vpermpd/vpermq SD nodes.Craig Topper2012-04-164-31/+20
* Fix SDTypeProfile for vpermps. The mask operand should be v8i32.Craig Topper2012-04-161-2/+4
* Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in...Craig Topper2012-04-151-9/+12
* Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with norm...Craig Topper2012-04-151-17/+8
* Fix PR12529. The Vxx family of instructions are only supported by AVX.Nadav Rotem2012-04-151-3/+13
* Wire up support for diagnostic ranges in the ARMAsmParser.Benjamin Kramer2012-04-151-3/+12
* Added VPERM optimization for AVX2 shufflesElena Demikhovsky2012-04-155-4/+76
* HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with -Asse...NAKAMURA Takumi2012-04-151-0/+2
* Target/Hexagon: Tweak to fix msvc build.NAKAMURA Takumi2012-04-151-2/+2
* Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x...Richard Smith2012-04-132-27/+33
* Remove iostream from New Value Jump.Sirish Pande2012-04-131-1/+0
* Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande2012-04-137-10/+684
* Pass to replace tranfer/copy instructions into combine instruction where poss...Sirish Pande2012-04-135-0/+484
* On Darwin targets, only use vfma etc. if the source use fma() intrinsic expli...Evan Cheng2012-04-131-2/+5
* For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-131-2/+2
* Silence various build warnings from Hexagon backend that show up in release b...Craig Topper2012-04-135-240/+220
* Fix a few more places in the ARM disassembler so that branches getKevin Enderby2012-04-122-4/+30
* Update CMake build.Ted Kremenek2012-04-122-4/+5
* Hexagon: fix CMake error.Evandro Menezes2012-04-121-1/+1
* HexagonPacketizer patch.Sirish Pande2012-04-1218-485/+7546
* Generalize r153635 to deal with TokenFactor chains; also clean up the logic a...Evan Cheng2012-04-121-41/+51
* Hexagon: enable assembler output through the MC layer.Evandro Menezes2012-04-1216-376/+685
* Remove README entry obsoleted by register masks.Benjamin Kramer2012-04-121-16/+0
* Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are i...Craig Topper2012-04-121-4/+4
* ARM 'adr' fixups don't need the interworking addend tweaking.Jim Grosbach2012-04-121-0/+3
* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-112-3/+9
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-113-0/+65
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-111-0/+2
* Fix bugs in lowering of FCOPYSIGN nodes.Akira Hatanaka2012-04-111-52/+91
* ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-112-2/+5
* ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach2012-04-112-2/+5
* remove unused argumentNadav Rotem2012-04-111-2/+2
* Add a C binding to the Target and TargetMachine classes to allow for emittingDuncan Sands2012-04-112-0/+198
* Add more fused mul+add/sub patterns. rdar://10139676Evan Cheng2012-04-112-4/+50
* Reapply 154396 after fixing a test.Nadav Rotem2012-04-114-36/+87
* Clean up ARM fused multiply + add/sub support some more: rename some iselEvan Cheng2012-04-117-60/+52
* Match (fneg (fma) to vfnma. rdar://10139676Evan Cheng2012-04-111-0/+8
* Add retw and lretw instructions. Also, fix Intel syntax parsing for allCharles Davis2012-04-111-5/+10
* Fix ARM disassembly of VLD instructions with writebacks.  And add test a caseKevin Enderby2012-04-111-0/+12
* ARM add missing Thumb1 two-operand aliases for shift-by-immediate.Jim Grosbach2012-04-112-0/+39