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* Add 64-bit addressing to PTX backendChe-Liang Chiou2011-03-029-44/+121
* Extend initial support for primitive types in PTX backendChe-Liang Chiou2011-03-0210-121/+440
* Add datalayout information for the IEEE quad precision fp128 type.Duncan Sands2011-03-011-4/+4
* Narrow right shifts need to encode their immediates differently from a normalBill Wendling2011-03-014-5/+56
* add a noteChris Lattner2011-03-011-0/+15
* Fix .fpu printing in ARM assembly, regarding bug http://llvm.org/bugs/show_bu...Renato Golin2011-02-281-4/+38
* Add missing whitespace in the formatting.Kevin Enderby2011-02-281-1/+1
* fix a signed comparison warning.Chris Lattner2011-02-281-1/+1
* [AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bitDavid Greene2011-02-284-30/+120
* Fix the arm's disassembler for blx that was building an MCInst without theKevin Enderby2011-02-281-1/+13
* Fix a typo which cause dag combine crash. rdar://9059537.Evan Cheng2011-02-281-1/+1
* Support for byval parameters on ARM. Will be enabled by a forthcomingStuart Hastings2011-02-283-9/+47
* Add branch hinting for SPU. Kalle Raiskila2011-02-284-5/+94
* Add preliminary support for .f32 in the PTX backend.Che-Liang Chiou2011-02-285-10/+131
* Silence enum conversion warnings.Benjamin Kramer2011-02-271-2/+2
* Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/...NAKAMURA Takumi2011-02-271-17/+39
* Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize lega...Benjamin Kramer2011-02-261-37/+0
* Allow targets to specify a the type of the RHS of a shift parameterized on th...Owen Anderson2011-02-2516-157/+161
* Roll out r126425 and r126450 to see if it fixes the failures on the buildbots.Cameron Zwarich2011-02-254-11/+1
* Add patterns to use post-increment addressing for Neon VST1-lane instructions.Bob Wilson2011-02-253-11/+39
* Fix typo.Evan Cheng2011-02-251-1/+1
* Each prologue may have multiple vpush instructions to store callee-savedEvan Cheng2011-02-251-2/+14
* remove command line option debugging hook.Chris Lattner2011-02-241-6/+0
* Enable DebugInfo support for COFF object files.Devang Patel2011-02-244-1/+11
* Add XCore intrinsic for eeu instruction.Richard Osborne2011-02-241-0/+4
* Fix bug in X86 folding / unfolding table. Int_CMPSDrm and Int_CMPSSrm memoryEvan Cheng2011-02-241-2/+2
* Add XCore intrinsic for clre instruction.Richard Osborne2011-02-231-1/+3
* Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enableRichard Osborne2011-02-231-1/+7
* Add XCore intrinsic for the setv instruction.Richard Osborne2011-02-231-1/+6
* Fix format for setc instruction.Richard Osborne2011-02-231-1/+1
* Add XCore intrinsic for settw instruction.Richard Osborne2011-02-231-1/+5
* Change VFPNeonA8 definition to make the code easier to read.Evan Cheng2011-02-232-8/+3
* More fcopysign correctness and performance fix.Evan Cheng2011-02-231-33/+63
* [AVX] General VUNPCKL codegen support.David Greene2011-02-222-0/+20
* Use the same (%dx) hack for in[bwl] as for out[bwl].Joerg Sonnenberger2011-02-221-0/+13
* VFP single precision arith instructions can go down to NEON pipeline, but on ...Evan Cheng2011-02-226-109/+114
* Stack alignment is 16 bytes on FreeBSD/i386 too.Roman Divacky2011-02-222-3/+5
* Guard against de-referencing MBB.end().Evan Cheng2011-02-221-1/+4
* available_externally (hidden or not) GVs are always accessed via stubs. rdar:...Evan Cheng2011-02-221-1/+3
* Only use blx for external function calls on thumb, these could be fixedEric Christopher2011-02-221-12/+26
* Recognize loopz and loopnz as aliases for loope and loopne.Joerg Sonnenberger2011-02-221-0/+3
* Implement xgetbv and xsetbv.Rafael Espindola2011-02-224-0/+19
* Skipping over debugvalue instructions to determine whether the split spot is ...Evan Cheng2011-02-211-0/+3
* Revert r124611 - "Keep track of incoming argument's location while emitting L...Devang Patel2011-02-216-25/+25
* Fixed a bug in the X86 disassembler where a member of theSean Callanan2011-02-212-5/+5
* Add XCore intrinsics for various instructions on ports.Richard Osborne2011-02-211-2/+24
* The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri.Duncan Sands2011-02-212-3/+4
* a serious "compare CSE" issue that is nontrivial to get right,Chris Lattner2011-02-211-0/+69
* Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel.NAKAMURA Takumi2011-02-211-2/+6
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-214-8/+84
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