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* SDISel does not preserve all, it changes CFG and other info.Evan Cheng2007-03-271-1/+0
* Don't call getOperandConstraint() if operand index is greater thanEvan Cheng2007-03-271-1/+2
* Spell check.Devang Patel2007-03-271-1/+1
* Implement some minor review feedback.Reid Spencer2007-03-261-3/+3
* For PR1271:Reid Spencer2007-03-261-1/+1
* Reduce malloc/free traffic.Devang Patel2007-03-261-12/+8
* It is not possible to determie dominance between two PHI nodesDevang Patel2007-03-261-0/+6
* Use std::vector<DFCalculateWorkObject> instead ofDevang Patel2007-03-261-7/+4
* findRegisterUseOperand() changed.Evan Cheng2007-03-262-3/+3
* Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng2007-03-262-22/+33
* Change findRegisterUseOperand() to return operand index instead.Evan Cheng2007-03-261-4/+4
* Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable toDale Johannesen2007-03-261-15/+15
* eliminate use of std::setChris Lattner2007-03-261-6/+4
* Add a comment to explain a folding transform.Reid Spencer2007-03-261-0/+1
* Get better debug output by having modified instructions print both theReid Spencer2007-03-261-2/+10
* Get the number of bits to set in a mask correct for a shl/lshr transform.Reid Spencer2007-03-261-1/+1
* Promote to v1i64 type...Bill Wendling2007-03-261-9/+15
* Updated.Bill Wendling2007-03-261-54/+0
* Add support for the v1i64 type. This makes better code for this:Bill Wendling2007-03-263-28/+58
* SIGN_EXTEND_INREG requires one extra operand, a ValueType node.Evan Cheng2007-03-261-2/+6
* For PR1271:Reid Spencer2007-03-261-1/+1
* Look through bitcast when finding IVs. (Chris' patch really.)Dale Johannesen2007-03-261-0/+10
* For PR1271:Reid Spencer2007-03-251-12/+11
* implement Transforms/InstCombine/cast2.ll:test3 and PR1263Chris Lattner2007-03-251-1/+21
* Some cleanup from review:Reid Spencer2007-03-251-16/+18
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-251-176/+249
* Fix authorshipAnton Korobeynikov2007-03-251-1/+1
* fold constantexprs more aggressively, fixing PR1265Chris Lattner2007-03-251-2/+17
* Refactor several ConstantExpr::getXXX calls with ConstantInt argumentsReid Spencer2007-03-251-27/+40
* add a noteChris Lattner2007-03-251-0/+1
* 1. Avoid unnecessary APInt construction if possible.Zhou Sheng2007-03-251-7/+5
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
* add a noteChris Lattner2007-03-251-0/+13
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
* implement initial support for the silly X constraint. Testcase here: CodeGen...Chris Lattner2007-03-251-0/+2
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2510-65/+79
* More APIntification:Reid Spencer2007-03-251-24/+24
* Allow the b/h/w/k constraints to be applied to values that have multiple alte...Chris Lattner2007-03-251-1/+4
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
* don't rely on ADLChris Lattner2007-03-241-1/+1
* add a valuetype for v1i64, which is needed by mmx.Chris Lattner2007-03-241-0/+3
* Make some codes more efficient.Zhou Sheng2007-03-241-15/+17
* add a bad case evan though of.Chris Lattner2007-03-241-0/+32
* For PR1205:Reid Spencer2007-03-241-12/+11
* Adjust offset to compensate for big endian machines.Evan Cheng2007-03-241-7/+5
* Autodetect MMX & SSE stuff for AMD processorsAnton Korobeynikov2007-03-231-10/+11
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