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* Ignore generated files Lexer.cpp and llvmAsmParser.*Misha Brukman2002-12-021-0/+2
* * Abstracted out stack space allocation into its own functionMisha Brukman2002-12-021-34/+36
* Fix order of operands on a store from reg to [reg+offset].Misha Brukman2002-12-021-2/+2
* Add rawfrm flagsChris Lattner2002-12-013-11/+49
* Don't add implicit regsChris Lattner2002-12-012-2/+2
* brgBrian Gaeke2002-11-302-98/+148
* brgBrian Gaeke2002-11-293-8/+51
* Fix logical error in TD pass: we should clear Mod/Ref bits of each callerVikram S. Adve2002-11-273-8/+17
* (1) Bug fix that was causing nodes with dangling references to be freed.Vikram S. Adve2002-11-272-154/+402
* brgBrian Gaeke2002-11-262-6/+66
* Keep global nodes in each DS Graph (by forcing them to be marked live).Vikram S. Adve2002-11-251-3/+3
* Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print outMisha Brukman2002-11-221-2/+2
* Enable the register allocator pass.Misha Brukman2002-11-221-1/+5
* A simple (spilling) register allocator.Misha Brukman2002-11-221-0/+219
* Added methods to read/write values to stack in .h, fixed implementation inMisha Brukman2002-11-222-21/+39
* Added -*- C++ -*- mode to the comments.Misha Brukman2002-11-221-1/+1
* Add a simple way to add memory locations of format [reg+offset]Misha Brukman2002-11-221-0/+9
* lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.Brian Gaeke2002-11-222-0/+28
* Handle cmp Reg, 0 correctlyChris Lattner2002-11-212-20/+26
* Printing support for more stuffChris Lattner2002-11-211-20/+20
* Don't add implicit operandsChris Lattner2002-11-212-10/+10
* Fix off by one bugChris Lattner2002-11-212-2/+2
* Add fixmeChris Lattner2002-11-211-0/+3
* Minor code cleanupsChris Lattner2002-11-212-4/+2
* Implement printing of store instructionsChris Lattner2002-11-212-10/+40
* The big change here is to handle printing/emission of X86II::MRMSrcMemChris Lattner2002-11-212-46/+368
* Remove implicit information from instruction selectorChris Lattner2002-11-212-12/+4
* Add printing information for MUL and DIVChris Lattner2002-11-211-12/+15
* Fix a bug that prevented compilation of multiple functionsChris Lattner2002-11-212-0/+2
* Remove opcode information for instructions that are completely defined nowChris Lattner2002-11-211-22/+22
* Add printing support for sahf & setccChris Lattner2002-11-211-15/+15
* Add printing support for /0 /1 type instructionsChris Lattner2002-11-212-2/+88
* Add support for /0 /1, etc type instructionsChris Lattner2002-11-211-5/+16
* User defined operators are not supposed to live beyond the lifetime of theChris Lattner2002-11-211-0/+9
* Rename the SetCC X86 instructions to reflect the fact that they are theChris Lattner2002-11-213-14/+14
* Simplify setcc code a bitChris Lattner2002-11-212-246/+122
* Support Registers of the form (B8+ rd) for exampleChris Lattner2002-11-212-20/+110
* Dont' set flagsChris Lattner2002-11-212-16/+10
* Implement printing more, implement opcode output moreChris Lattner2002-11-212-20/+114
* Huge diff do to reindeinting comments.Chris Lattner2002-11-211-85/+88
* Add new prefix flagChris Lattner2002-11-211-0/+5
* Print another class of instructions correctly, giving us: xorl EDX, EDXChris Lattner2002-11-212-30/+74
* Booleans are types too. And they get stored in bytes. And InstructionSelectionMisha Brukman2002-11-211-0/+1
* Initial checkin of Module cloning support stuffChris Lattner2002-11-204-4/+179
* X86 target builds fine nowChris Lattner2002-11-201-1/+1
* Fix symbol table problemChris Lattner2002-11-201-11/+10
* Add definitions for function headers from MRegisterInfo.h:Misha Brukman2002-11-203-0/+188
* Check not only for MO_VirtualRegister, but MO_MachineRegister as well whenMisha Brukman2002-11-202-14/+28
* Initialize the SSARegMap.Misha Brukman2002-11-201-0/+1
* Don't build X86 target yetChris Lattner2002-11-201-1/+1
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