| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., | Venkatraman Govindaraju | 2013-06-04 | 19 | -154/+157 |
| * | IndVarSimplify: check if loop invariant expansion can trap | David Majnemer | 2013-06-04 | 1 | -1/+1 |
| * | ARM: Fix crash in ARM backend inside of ARMConstantIslandPass | David Majnemer | 2013-06-04 | 1 | -0/+1 |
| * | R600: Swizzle texture/export instructions | Vincent Lejeune | 2013-06-04 | 2 | -20/+126 |
| * | Second part of pr16069 | Rafael Espindola | 2013-06-04 | 1 | -4/+9 |
| * | Typo: s/caes/cases/ in SimplifyCFG | Hans Wennborg | 2013-06-04 | 1 | -1/+1 |
| * | Preserve const correctness. | Benjamin Kramer | 2013-06-04 | 1 | -3/+3 |
| * | Test commit for user vmedic, to verify commit access. One line of comment is ... | Vladimir Medic | 2013-06-04 | 1 | -1/+1 |
| * | Silencing an MSVC warning about mixing bool and unsigned int. | Aaron Ballman | 2013-06-04 | 1 | -1/+1 |
| * | Silencing an MSVC warning about */ being found outside of a comment. | Aaron Ballman | 2013-06-04 | 1 | -2/+2 |
| * | Fix a defect in code-layout pass, improving Benchmarks/Olden/em3d/em3d by abo... | Shuxin Yang | 2013-06-04 | 1 | -1/+25 |
| * | Delete dead safety check. | Nick Lewycky | 2013-06-03 | 1 | -6/+1 |
| * | SimplifyCFG: Do not transform PHI to select if doing so would be unsafe | David Majnemer | 2013-06-03 | 1 | -2/+19 |
| * | SimplifyCFG: Small cleanup, use ICmpInst::isEquality() | David Majnemer | 2013-06-03 | 1 | -3/+1 |
| * | Update RuntimeDyldELF::findOPDEntrySection the new relocation iterators. | Rafael Espindola | 2013-06-03 | 1 | -3/+7 |
| * | R600/SI: Add support for work item and work group intrinsics | Tom Stellard | 2013-06-03 | 3 | -15/+88 |
| * | R600/SI: Add a calling convention for compute shaders | Tom Stellard | 2013-06-03 | 3 | -9/+39 |
| * | R600/SI: Custom lower i64 sign_extend | Tom Stellard | 2013-06-03 | 2 | -0/+19 |
| * | R600/SI: Adjust some instructions' out register class after ISel | Tom Stellard | 2013-06-03 | 2 | -0/+52 |
| * | R600/SI: Handle REG_SEQUENCE in fitsRegClass() | Tom Stellard | 2013-06-03 | 1 | -3/+13 |
| * | R600/SI: Handle nodes with glue results correctly SITargetLowering::foldOpera... | Tom Stellard | 2013-06-03 | 1 | -0/+16 |
| * | R600/SI: Fixup CopyToReg register class in PostprocessISelDAG() | Tom Stellard | 2013-06-03 | 1 | -5/+33 |
| * | R600/SI: Add support for global loads | Tom Stellard | 2013-06-03 | 3 | -4/+39 |
| * | R600/SI: Rework MUBUF store instructions | Tom Stellard | 2013-06-03 | 5 | -42/+71 |
| * | R600: 3 op instructions have no write bit but the result are store in PV | Vincent Lejeune | 2013-06-03 | 1 | -3/+1 |
| * | R600: CALL_FS consumes a stack size entry | Vincent Lejeune | 2013-06-03 | 1 | -0/+1 |
| * | R600: use capital letter for PV channel | Vincent Lejeune | 2013-06-03 | 1 | -4/+4 |
| * | R600: Constraints input regs of interp_xy,_zw | Vincent Lejeune | 2013-06-03 | 2 | -11/+15 |
| * | [asan] ASan Linux MIPS32 support (llvm part), patch by Jyun-Yan Y | Kostya Serebryany | 2013-06-03 | 1 | -1/+10 |
| * | X86: sub_xmm registers are 128 bits wide. | Ahmed Bougacha | 2013-06-03 | 1 | -1/+1 |
| * | Introduce needsCleanup() for APFloat and APInt. | Manuel Klimek | 2013-06-03 | 1 | -1/+1 |
| * | Sparc: Add support for indirect branch and blockaddress in Sparc backend. | Venkatraman Govindaraju | 2013-06-03 | 4 | -0/+37 |
| * | [Object/COFF] Fix Windows .lib name handling. | Rui Ueyama | 2013-06-03 | 1 | -4/+10 |
| * | Sparc: When storing 0, use %g0 directly in the store instruction instead of | Venkatraman Govindaraju | 2013-06-03 | 2 | -0/+8 |
| * | Sparc: Combine add/or/sethi instruction with restore if possible. | Venkatraman Govindaraju | 2013-06-02 | 1 | -22/+177 |
| * | Sparc: Perform leaf procedure optimization by default | Venkatraman Govindaraju | 2013-06-02 | 1 | -1/+1 |
| * | When determining the new index for an insertelement, we may not assume that an | Nick Lewycky | 2013-06-01 | 1 | -7/+9 |
| * | Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics ... | Venkatraman Govindaraju | 2013-06-01 | 1 | -0/+6 |
| * | SimplifyCFG: Fix typo in comment for ComputeSpeculationCost | David Majnemer | 2013-06-01 | 1 | -1/+1 |
| * | Move getRealLinkageName to a common place and remove all the duplicates of it. | Benjamin Kramer | 2013-06-01 | 4 | -65/+25 |
| * | Move object construction into [] so the temporary can be moved. | Benjamin Kramer | 2013-06-01 | 1 | -5/+3 |
| * | APInt: Simplify code. No functionality change. | Benjamin Kramer | 2013-06-01 | 1 | -36/+2 |
| * | APFloat: Use isDenormal instead of hand-rolled code to check for denormals. | Benjamin Kramer | 2013-06-01 | 1 | -1/+1 |
| * | Revert r183069: "TMP: LEA64_32r fixing" | Tim Northover | 2013-06-01 | 4 | -155/+54 |
| * | TMP: LEA64_32r fixing | Tim Northover | 2013-06-01 | 4 | -54/+155 |
| * | X86: change MOV64ri64i32 into MOV32ri64 | Tim Northover | 2013-06-01 | 4 | -32/+45 |
| * | [Sparc] Generate correct code for leaf functions with stack objects | Venkatraman Govindaraju | 2013-06-01 | 4 | -30/+79 |
| * | Make SubRegIndex size mandatory, following r183020. | Ahmed Bougacha | 2013-05-31 | 9 | -39/+40 |
| * | Prevent loop-unroll from making assumptions about undefined behavior. | Andrew Trick | 2013-05-31 | 1 | -5/+14 |
| * | Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it | Eric Christopher | 2013-05-31 | 4 | -45/+32 |
