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* Make SMDiagnostic a little more sane. Instead of passing around note/warning...Chris Lattner2011-10-166-32/+39
* Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does...Chris Lattner2011-10-165-55/+137
* Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...Craig Topper2011-10-163-18/+54
* Add X86 feature detection support for BMI instructions. Added new cpuid funct...Craig Topper2011-10-163-18/+107
* Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ...Craig Topper2011-10-153-17/+46
* The CELL backend cannot select patterns for vector trunc-store and shl on v2...Nadav Rotem2011-10-151-0/+9
* ARM cannot select a pattern for trunc-store v4i8; /ARM/vrev.ll fails when pro...Nadav Rotem2011-10-151-0/+2
* SmallVector -> arrayBenjamin Kramer2011-10-151-3/+3
* Don't replace all dominated uses if there is only one use, since thatDuncan Sands2011-10-151-4/+9
* Add a bad char heuristic to StringRef::find.Benjamin Kramer2011-10-151-3/+26
* Move the legalization of vector loads and stores into LegalizeVectorOps. In someNadav Rotem2011-10-152-183/+123
* Fix SCEVExpander assert during LSR: "argument of incompatible type".Andrew Trick2011-10-151-6/+5
* Revert r142046, "Fix for llvm::sys::getHostTriple on Windows. Instead of rel...NAKAMURA Takumi2011-10-151-36/+4
* Fix for llvm::sys::getHostTriple on Windows. Instead of relying on the tripleChad Rosier2011-10-151-4/+36
* Windows/Memory.inc: Support the ability to allocate memory "near" another blo...NAKAMURA Takumi2011-10-151-2/+7
* Fix indvars randomness by removing iteration over a map.Andrew Trick2011-10-151-12/+12
* Clear out the landing pad to call site map for each function.Bill Wendling2011-10-151-0/+1
* Mark tADDrSPi as having side effects again.Jakob Stoklund Olesen2011-10-151-3/+3
* Thumb1 does not support dynamic stack realignment.Chad Rosier2011-10-151-0/+5
* Mark registers as DEAD because they're really just clobbers.Bill Wendling2011-10-151-1/+1
* Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixe...Eli Friedman2011-10-141-0/+8
* Make sure that the register is in the register class before adding it as a ma...Bill Wendling2011-10-141-1/+3
* Mark the invoke call instruction as implicitly defining the callee-saved regi...Bill Wendling2011-10-141-2/+31
* constify array itself, don't iterate multiple times.Chris Lattner2011-10-141-2/+2
* Allow the source module to be materialized during the linking process.Tanya Lattner2011-10-141-2/+11
* Fix a non-firing assert. Change:Richard Trieu2011-10-141-1/+1
* ocaml bindings: add getopcode for constant and instruction, and int64_of_const.Torok Edwin2011-10-141-0/+6
* bindings: tab and indentation fixes of my previous commitsTorok Edwin2011-10-141-25/+25
* A few 80-col violations.Evan Cheng2011-10-142-5/+10
* Disable code/data region symbols on ELF targets, where different mapping symb...Owen Anderson2011-10-141-1/+1
* Add an implementation of the CanLowerReturn function to the PPC backendHal Finkel2011-10-142-0/+17
* Add f128 to datalayout string.Akira Hatanaka2011-10-141-2/+2
* initial test commit (remove whitespace)Hal Finkel2011-10-141-2/+2
* Update live-in lists when splitting critical edges.Jakob Stoklund Olesen2011-10-141-0/+5
* Revert r141932, r141936 and r141937.Akira Hatanaka2011-10-144-299/+1
* Fix typo. "__sync_fetch_and-xor_4" should be "__sync_fetch_and_xor_4".Jim Grosbach2011-10-141-1/+1
* An instruction's operands aren't necessarily instructions or constants. TheyNick Lewycky2011-10-141-1/+2
* Add X86 ANDN instruction. Including instruction selection.Craig Topper2011-10-144-2/+41
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-145-5/+54
* Definition of function getMipsRegisterNumbering.Akira Hatanaka2011-10-141-0/+113
* Add definition of class MipsELFWriterInfo. Akira Hatanaka2011-10-143-0/+276
* Add missing relocation types.Akira Hatanaka2011-10-141-1/+3
* Fixup enumerations.Akira Hatanaka2011-10-141-0/+90
* Add more Mips relocation types.Akira Hatanaka2011-10-141-1/+21
* Ban rematerializable instructions with side effects.Jakob Stoklund Olesen2011-10-144-11/+13
* V_SET0 has no side effects.Jakob Stoklund Olesen2011-10-141-1/+1
* Add value numbers when spilling dead defs.Jakob Stoklund Olesen2011-10-141-1/+9
* Avoid undefined behavior in negation in LSR. Patch by Ahmed Charles.Eli Friedman2011-10-131-2/+2
* Fix undefined shift. Patch by Ahmed Charles.Eli Friedman2011-10-131-1/+1
* Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman2011-10-131-8/+1