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* GV with ghost linkage (module being lazily streamed in in JIT lazy compilatio...Evan Cheng2009-07-161-5/+9
* Assume an inline asm might be a call, so we getDale Johannesen2009-07-161-0/+4
* Emit line numbers in asm comments when available.David Greene2009-07-161-2/+15
* Privatize the MDString uniquing table.Owen Anderson2009-07-164-29/+36
* Fix inverted preprocessor conditional.Daniel Dunbar2009-07-161-1/+1
* Fix compiler warning (for -Asserts).Daniel Dunbar2009-07-161-2/+2
* Silence warning in Linux builds:Jakob Stoklund Olesen2009-07-161-2/+3
* Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output.Daniel Dunbar2009-07-161-0/+17
* Add line numbers to OProfile. To do this, I added a processDebugLoc()Jeffrey Yasskin2009-07-164-8/+106
* Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm ope...Jakob Stoklund Olesen2009-07-161-8/+12
* Changed my mind. We now allow remat of instructions whose defs have subreg in...Evan Cheng2009-07-162-6/+8
* Privatize the ConstantFP table. I'm on a roll!Owen Anderson2009-07-166-75/+74
* With recent MC changes, RIP base register is explicitly modeled. Make sure we...Evan Cheng2009-07-161-7/+9
* Update CMake file.Ted Kremenek2009-07-161-0/+1
* Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a num...Owen Anderson2009-07-1629-85/+165
* Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a genericKevin Enderby2009-07-161-3/+6
* Fill in some holes in ScalarEvolution's loop iteration conditionDan Gohman2009-07-161-2/+27
* Add an isLoopSimplifyForm() predicate, following the example ofDan Gohman2009-07-161-0/+24
* Use size_t.Dan Gohman2009-07-162-13/+13
* UnbreakAnton Korobeynikov2009-07-1611-56/+122
* Temporary disable 16 bit bswapAnton Korobeynikov2009-07-161-3/+4
* Add instruction formats and few opcodesAnton Korobeynikov2009-07-162-983/+705
* Add bswap patternsAnton Korobeynikov2009-07-161-0/+18
* Provide crazy pseudos for regpairs spills / reloadsAnton Korobeynikov2009-07-162-2/+47
* Handle long-disp stuff more consistentlyAnton Korobeynikov2009-07-163-7/+31
* All FP instructions have 12 bit memory displacement fieldAnton Korobeynikov2009-07-161-34/+34
* Another predicate routineAnton Korobeynikov2009-07-162-0/+31
* More helpersAnton Korobeynikov2009-07-162-0/+66
* Add bunch of branch folding stuffAnton Korobeynikov2009-07-163-1/+187
* Add missed opcodes to short => long displacement conversionAnton Korobeynikov2009-07-161-0/+2
* CleanupAnton Korobeynikov2009-07-161-91/+29
* Fix logic inversion for RI-mode address selectionAnton Korobeynikov2009-07-161-1/+1
* Expand 32-bit bitconverts via memoryAnton Korobeynikov2009-07-161-2/+2
* Fix incomin arg stack frame offset in case we need to generate stack frameAnton Korobeynikov2009-07-161-1/+1
* Fix instruction mnemonics for some fp_to_sint operationsAnton Korobeynikov2009-07-161-2/+2
* i32 values are passed extended also on stack. Handle this in generic wayAnton Korobeynikov2009-07-161-23/+24
* We definitely have 1-0 boolsAnton Korobeynikov2009-07-161-0/+1
* Revert the commit, it just hides the real bugAnton Korobeynikov2009-07-161-1/+2
* Out GR128 regclass is not a 'real' i128 one.Anton Korobeynikov2009-07-163-5/+4
* Add missed condbranch opcodesAnton Korobeynikov2009-07-161-5/+29
* Handle bitconvertsAnton Korobeynikov2009-07-163-4/+16
* Unbreak mvi and friends - emit only 'significant' part of the operandAnton Korobeynikov2009-07-162-6/+17
* Expand fp_to_uint tooAnton Korobeynikov2009-07-161-0/+3
* We don't have FP truncstoresAnton Korobeynikov2009-07-161-0/+3
* Expand uint_to_fpAnton Korobeynikov2009-07-161-0/+2
* Emit proper rounding mode for fp_to_sintAnton Korobeynikov2009-07-161-4/+4
* f32/f64 regs are stored on stack if we're short in FP regsAnton Korobeynikov2009-07-161-2/+2
* Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension ...Anton Korobeynikov2009-07-161-2/+1
* Make FP zero to be legal FP immediate via LOAD ZEROAnton Korobeynikov2009-07-162-0/+48
* Loads are not two-address in any wayAnton Korobeynikov2009-07-161-8/+7
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