| Commit message (Expand) | Author | Age | Files | Lines |
* | Teach Legalize how to do something with EXTRACT_ELEMENT when the type of | Nate Begeman | 2005-10-19 | 1 | -7/+30 |
* | Make a new reg class for 64 bit regs that aliases the 32 bit regs. This | Nate Begeman | 2005-10-19 | 3 | -9/+50 |
* | Add the ability to lower return instructions to TargetLowering. This | Nate Begeman | 2005-10-18 | 4 | -7/+39 |
* | Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero | Chris Lattner | 2005-10-18 | 1 | -0/+1 |
* | remove hack | Chris Lattner | 2005-10-18 | 1 | -3/+1 |
* | Simple edits; remove unimplimented cases and clarify long haul SLU cases. | Jim Laskey | 2005-10-18 | 4 | -61/+3 |
* | Fix the JIT encoding of LWA, LD, STD, and STDU. | Chris Lattner | 2005-10-18 | 3 | -4/+20 |
* | Checking in first round of scheduling tablegen files. Not tied in as yet. | Jim Laskey | 2005-10-18 | 6 | -0/+947 |
* | add a case | Chris Lattner | 2005-10-18 | 1 | -0/+3 |
* | Add an option to this pass. If it is set, we are allowed to internalize | Chris Lattner | 2005-10-18 | 1 | -4/+10 |
* | Fold (select C, load A, load B) -> load (select C, A, B). This happens quite | Chris Lattner | 2005-10-18 | 1 | -7/+82 |
* | Do the right thing and enable 64 bit regs under the control of a subtarget | Nate Begeman | 2005-10-18 | 3 | -8/+10 |
* | First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is | Nate Begeman | 2005-10-18 | 9 | -88/+154 |
* | Implement some feedback from Chris re: constant canonicalization | Nate Begeman | 2005-10-18 | 1 | -39/+27 |
* | Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work. | Nate Begeman | 2005-10-18 | 1 | -0/+25 |
* | fold fmul X, +2.0 -> fadd X, X; | Nate Begeman | 2005-10-17 | 1 | -14/+17 |
* | Make this work for FP constantexprs | Chris Lattner | 2005-10-17 | 1 | -2/+3 |
* | Oops, X+0.0 isn't foldable, but X+-0.0 is. | Chris Lattner | 2005-10-17 | 1 | -4/+5 |
* | relax this a bit, as we only support the default rounding mode | Chris Lattner | 2005-10-17 | 1 | -2/+4 |
* | add a trivial fold | Chris Lattner | 2005-10-17 | 1 | -0/+4 |
* | More PPC32 -> PPC changes, as well as merging some classes that were | Nate Begeman | 2005-10-16 | 20 | -170/+152 |
* | Fix this logic. | Chris Lattner | 2005-10-15 | 1 | -1/+1 |
* | Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm... | Chris Lattner | 2005-10-15 | 1 | -0/+14 |
* | Remove some dead code now that the dag combiner exists. | Nate Begeman | 2005-10-15 | 1 | -15/+0 |
* | Remove some dead code: the ORI/ORIS cases are autogen'd. This makes | Chris Lattner | 2005-10-15 | 1 | -42/+1 |
* | prune #includes | Chris Lattner | 2005-10-15 | 2 | -3/+2 |
* | These instructions are now autogenerated | Chris Lattner | 2005-10-15 | 1 | -34/+0 |
* | Add a pattern for FSQRTS | Chris Lattner | 2005-10-15 | 1 | -1/+1 |
* | remove dead code | Chris Lattner | 2005-10-15 | 1 | -8/+3 |
* | Use getExtLoad here instead of getNode, as extloads produce two values. This | Chris Lattner | 2005-10-15 | 1 | -2/+3 |
* | remove broken SRA/rlwimi case | Chris Lattner | 2005-10-15 | 1 | -11/+2 |
* | Rename PPC32*.h to PPC*.h | Chris Lattner | 2005-10-14 | 12 | -17/+16 |
* | Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo | Chris Lattner | 2005-10-14 | 5 | -45/+22 |
* | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 15 | -19/+19 |
* | Rename PowerPCInstrBuilder.h -> PPC* | Chris Lattner | 2005-10-14 | 3 | -3/+3 |
* | Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine | Chris Lattner | 2005-10-14 | 4 | -49/+24 |
* | Rename PowerPC*.td -> PPC*.td | Chris Lattner | 2005-10-14 | 2 | -4/+4 |
* | These are dead | Chris Lattner | 2005-10-14 | 2 | -74/+0 |
* | Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td | Chris Lattner | 2005-10-14 | 9 | -32/+70 |
* | Like the comment says... | Chris Lattner | 2005-10-14 | 1 | -6/+0 |
* | Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions | Chris Lattner | 2005-10-14 | 6 | -87/+11 |
* | Properly split f32 and f64 into separate register classes for scalar sse fp | Nate Begeman | 2005-10-14 | 5 | -79/+78 |
* | Remove an unnecsesary file. PPC32 and PPC64 share architected registers. | Nate Begeman | 2005-10-14 | 4 | -52/+38 |
* | add the integer truncate/extension operations | Chris Lattner | 2005-10-14 | 1 | -3/+14 |
* | These are now autogenerated | Chris Lattner | 2005-10-14 | 1 | -12/+0 |
* | Add patterns for FP round/extend | Chris Lattner | 2005-10-14 | 1 | -2/+2 |
* | add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend... | Chris Lattner | 2005-10-14 | 1 | -0/+13 |
* | fold sext_in_reg, sext_in_reg where both have the same VT. This was | Nate Begeman | 2005-10-14 | 1 | -1/+1 |
* | Allow $ | Chris Lattner | 2005-10-14 | 1 | -1/+1 |
* | Relax the checking on zextload generation a bit, since as sabre pointed out | Nate Begeman | 2005-10-14 | 2 | -27/+49 |