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* Add ELF and darwin support for static ctors and dtorsChris Lattner2005-12-132-0/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
* reindent a loop, unswitch a loop. No functionality changesChris Lattner2005-12-131-105/+109
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24692 91177308-0d34-0410-b5e6-96231b3b80d8
* Lowering constant pool entries on ppc exposed a bug in the recently addedNate Begeman2005-12-131-1/+1
| | | | | | | | ConstantVec legalizing code, which would return constantpool nodes that were not of the target's pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24691 91177308-0d34-0410-b5e6-96231b3b80d8
* Beautify a few patterns.Evan Cheng2005-12-131-15/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
* Some shl patterns which do load + store folding.Evan Cheng2005-12-131-6/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
* A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 ↵Evan Cheng2005-12-131-12/+18
| | | | | | addr:$src). Only to improve readibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
* Add and, or, and xor patterns which fold load + stores.Evan Cheng2005-12-131-41/+82
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
* Add inc + dec patterns which fold load + stores.Evan Cheng2005-12-131-6/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
* Add neg and not patterns which fold load + stores.Evan Cheng2005-12-131-6/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
* Missed a couple redundant explicit type casts.Evan Cheng2005-12-131-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.Evan Cheng2005-12-131-34/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
* * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.Evan Cheng2005-12-131-27/+33
| | | | | | | | This enables the removal of some explicit type casts. * Rename immZExt8 to i16ZExt8 as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some integer mul patterns.Evan Cheng2005-12-121-11/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
* Accept and ignore prefetches for nowChris Lattner2005-12-121-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24678 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.llChris Lattner2005-12-121-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24677 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some sub patterns.Evan Cheng2005-12-121-13/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
* When SelectLEAAddr() fails, it shouldn't cause the side effect of having theEvan Cheng2005-12-121-17/+48
| | | | | | | base or index operands being selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
* For ISD::RET, if # of operands >= 2, try selection the real data dep. operandEvan Cheng2005-12-121-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | first before the chain. e.g. int X; int foo(int x) { x += X + 37; return x; } If chain operand is selected first, we would generate: movl X, %eax movl 4(%esp), %ecx leal 37(%ecx,%eax), %eax rather than movl $37, %eax addl 4(%esp), %eax addl X, %eax which does not require %ecx. (Due to ADD32rm not matching.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
* fix FP selectsAndrew Lenharth2005-12-122-14/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24672 91177308-0d34-0410-b5e6-96231b3b80d8
* remove some never-completed and now-obsolete code.Chris Lattner2005-12-123-358/+0
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* Add a few more add / store patterns. e.g. ADD32mi8.Evan Cheng2005-12-121-10/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
* restore a more restricted selectAndrew Lenharth2005-12-121-0/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24668 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a little hack for parity with GCC on crafty. This speeds upChris Lattner2005-12-121-2/+277
| | | | | | | | | | | | | | | | | | | | | | | 186.crafty by about 16% (from 15.109s to 13.045s) on my system. This turns allocas with unions/casts into scalars. For example crafty has something like this: union doub { unsigned short i[4]; long long d; }; int f(long long a) { return ((union doub){.d=a}).i[1]; } Instead of generating loads and stores to an alloca, we now promote the whole thing to a scalar long value. This implements: Transforms/ScalarRepl/AggregatePromote.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24667 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo :(Chris Lattner2005-12-111-1/+1
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* Minor tweak to get isel optChris Lattner2005-12-111-1/+2
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* add selectccChris Lattner2005-12-111-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove type casts that are no longer neededChris Lattner2005-12-112-6/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24661 91177308-0d34-0410-b5e6-96231b3b80d8
* Realize the constant pool & global addrs must always be ptr typeChris Lattner2005-12-111-5/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the JIT failures from last night.Chris Lattner2005-12-111-1/+2
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* FP select improvements (and likely breakage), oh and crazy people might want ↵Andrew Lenharth2005-12-112-42/+46
| | | | | | to *return* floating point values. Don't see why myself git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24658 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for TargetConstantPool nodes to the dag isel emitter, and useNate Begeman2005-12-105-30/+45
| | | | | | | | them in the PPC backend, to simplify some logic out of Select and SelectAddr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
* Use SDTCisPtrTy type property for store address.Evan Cheng2005-12-101-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
* * Added X86 store patterns.Evan Cheng2005-12-103-43/+24
| | | | | | | * Added X86 dec patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
* Added new getNode and getTargetNode variants for X86 stores.Evan Cheng2005-12-101-60/+73
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24653 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support patterns to many load and store instructions which willNate Begeman2005-12-092-76/+133
| | | | | | | hopefully use patterns in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SDTCisPtrTy and use it for loads, to indicate that the operand of a loadChris Lattner2005-12-091-3/+5
| | | | | | | | must be a pointer. This removes a type check out of the code generated by tblgen for load matching. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
* Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %alEvan Cheng2005-12-091-3/+6
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* Avoid emitting two tabs when switching to a named sectionChris Lattner2005-12-091-2/+2
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* Teach the PPC backend about the ctor and dtor list when not using __main andChris Lattner2005-12-091-0/+34
| | | | | | | linking the entire program into one bc file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach legalize how to promote sext_inreg to fix a problem Andrew pointedChris Lattner2005-12-091-0/+5
| | | | | | | out to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24644 91177308-0d34-0410-b5e6-96231b3b80d8
* it helps if your conditionals are not reversedAndrew Lenharth2005-12-091-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
* improve code insertion in two ways:Chris Lattner2005-12-081-20/+26
| | | | | | | | | | | | | | 1. Only forward subst offsets into loads and stores, not into arbitrary things, where it will likely become a load. 2. If the source is a cast from pointer, forward subst the cast as well, allowing us to fold the cast away (improving cases when the cast is from an alloca or global). This hasn't been fully tested, but does appear to further reduce register pressure and improve code. Lets let the testers grind on it a bit. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another important case we missChris Lattner2005-12-081-0/+19
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* Added support for ComplexPattern.Evan Cheng2005-12-081-0/+21
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* Added explicit type field to ComplexPattern.Evan Cheng2005-12-081-2/+2
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* * Added intelligence to X86 LEA addressing mode matching routine so it returnsEvan Cheng2005-12-082-84/+103
| | | | | | | | false if the match is not profitable. e.g. leal 1(%eax), %eax. * Added patterns for X86 integer loads and LEA32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash where ConstantVec nodes were being generated with the wrongNate Begeman2005-12-072-2/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | type when the target did not support them. Also teach Legalize how to expand ConstantVecs. This allows us to generate _test: lwz r2, 12(r3) lwz r4, 8(r3) lwz r5, 4(r3) lwz r6, 0(r3) addi r2, r2, 4 addi r4, r4, 3 addi r5, r5, 2 addi r6, r6, 1 stw r2, 12(r3) stw r4, 8(r3) stw r5, 4(r3) stw r6, 0(r3) blr For: void %test(%v4i *%P) { %T = load %v4i* %P %S = add %v4i %T, <int 1, int 2, int 3, int 4> store %v4i %S, %v4i * %P ret void } On PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
* Only transform (sext (truncate x)) -> (sextinreg x) if before legalize orChris Lattner2005-12-071-1/+3
| | | | | | | if the target supports the resultant sextinreg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 doesn't support sextinreg for 8-bit things either.Chris Lattner2005-12-071-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the dag combiner to turn a truncate/sign_extend pair into a sextinregChris Lattner2005-12-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the types match up. This allows the X86 backend to compile: sbyte %toggle_value(sbyte* %tmp.1) { %tmp.2 = load sbyte* %tmp.1 ret sbyte %tmp.2 } to this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] ret instead of this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] movsx %EAX, %AL ret noticed in Shootout/objinst. -Chris git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
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