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* Fix thinkoAnton Korobeynikov2009-07-161-8/+6
* Fix epic bug with invalid regclass for R0DAnton Korobeynikov2009-07-161-1/+1
* Let RegisterInfo decide whether it can emit cross-class copy or notAnton Korobeynikov2009-07-161-4/+5
* More register pairs (now 32 bit ones)Anton Korobeynikov2009-07-161-0/+53
* Add even-odd register pairsAnton Korobeynikov2009-07-161-1/+62
* Unbreak due to mainline api changeAnton Korobeynikov2009-07-161-1/+1
* Preliminary mul loweringAnton Korobeynikov2009-07-162-0/+44
* More extloadsAnton Korobeynikov2009-07-162-0/+23
* SELECT_CC loweringAnton Korobeynikov2009-07-165-1/+155
* Conditional branches and comparisonsAnton Korobeynikov2009-07-164-3/+228
* Emit correct offset for PseudoSourceValueAnton Korobeynikov2009-07-161-6/+8
* Provide proper stack offsets for outgoing argumentsAnton Korobeynikov2009-07-164-8/+17
* Change register allocation order to reduce amount of callee-saved regs to be ...Anton Korobeynikov2009-07-161-18/+98
* Emit callee-saved regs spills / restoresAnton Korobeynikov2009-07-166-36/+188
* Scan for presence of calls and determine max callframe size early. To allow P...Anton Korobeynikov2009-07-162-25/+37
* Some preliminary call loweringAnton Korobeynikov2009-07-167-11/+302
* Prologue / epilogue emissionAnton Korobeynikov2009-07-162-3/+91
* Add simple frame index eliminationAnton Korobeynikov2009-07-163-2/+42
* Swap the order of imm and idx field for rri addrmode in order to make handlin...Anton Korobeynikov2009-07-163-11/+11
* Do not truncate sign bits for negative immsAnton Korobeynikov2009-07-162-21/+23
* Add address computation stuffAnton Korobeynikov2009-07-162-4/+82
* CleanupAnton Korobeynikov2009-07-161-4/+21
* Add mem-imm storesAnton Korobeynikov2009-07-162-1/+14
* [PATCH 023/155] TypoAnton Korobeynikov2009-07-161-1/+1
* Add stores and truncstoresAnton Korobeynikov2009-07-162-3/+30
* Add patterns for various extloadsAnton Korobeynikov2009-07-162-1/+44
* Do some heroic rri address matching (shamelessly stolen from x86 backend). No...Anton Korobeynikov2009-07-163-12/+268
* Change register allocation order, so R0 will be allocated the last among scra...Anton Korobeynikov2009-07-161-2/+2
* Add shifts and reg-imm address matchingAnton Korobeynikov2009-07-166-3/+245
* Add bunch of 32-bit patterns... Uffff :)Anton Korobeynikov2009-07-165-9/+115
* Propagate return result extension typeAnton Korobeynikov2009-07-161-0/+7
* Add 32 bit subregsAnton Korobeynikov2009-07-164-29/+90
* Add another bunch of reg-imm patterns for add/or/and/xorAnton Korobeynikov2009-07-161-0/+27
* Add bunch of reg-imm movsAnton Korobeynikov2009-07-162-0/+57
* Proper match halfword-imm operands for mov and addAnton Korobeynikov2009-07-161-7/+14
* Provide masked reg-imm 'or' and 'and'Anton Korobeynikov2009-07-162-3/+77
* Add reg-reg and patternAnton Korobeynikov2009-07-161-0/+8
* Add sub reg-reg patternAnton Korobeynikov2009-07-161-0/+6
* Add xor reg-reg patternAnton Korobeynikov2009-07-161-0/+7
* Add or reg-reg pattern.Anton Korobeynikov2009-07-161-0/+8
* Add add reg-reg and reg-imm patternsAnton Korobeynikov2009-07-162-1/+33
* Add simple reg-reg and reg-imm movesAnton Korobeynikov2009-07-163-8/+68
* Minimal lowering for formal_arguments / retAnton Korobeynikov2009-07-163-1/+174
* Let's start another backend :)Anton Korobeynikov2009-07-1623-0/+1873
* Combine an unaligned store of unaligned load into a memmove.Richard Osborne2009-07-162-0/+54
* Lower the threshold at which memcpy / memmove / memset stop being expandedRichard Osborne2009-07-161-0/+3
* Fix typo in last commit on expansion of unaligned loads.Richard Osborne2009-07-161-2/+2
* Expand unaligned 32 bit loads from an address which is a constantRichard Osborne2009-07-161-0/+109
* Custom lower unaligned 32 bit stores and loads into libcalls. This is Richard Osborne2009-07-162-1/+90
* Let callers decide the sub-register index on the def operand of rematerialize...Evan Cheng2009-07-1617-46/+60
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