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* Removing the useless test that I added recently. It was meant as an example, ...Andrew Trick2010-11-201-3/+6
* RABasic fix. Regalloc is responsible for updating block live ins.Andrew Trick2010-11-201-0/+30
* Whitespace.Andrew Trick2010-11-201-20/+20
* Add more Thumb add instruction encodings.Bill Wendling2010-11-201-12/+47
* Add Thumb encodings for some add instructions.Bill Wendling2010-11-201-6/+26
* Add more encodings for Thumb instructions.Bill Wendling2010-11-201-15/+30
* Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the sameBill Wendling2010-11-201-9/+21
* Check for _setjmp too, because it's also used.Bill Wendling2010-11-201-0/+1
* Fix ARM LDR* post-indexed operand encoding.Jim Grosbach2010-11-191-5/+5
* Encodings for the compare instructions.Bill Wendling2010-11-191-8/+19
* The Vm and Vn register fields must be the same for a register-register vmov.Owen Anderson2010-11-191-2/+6
* Fix a cut-n-paste-error.Evan Cheng2010-11-191-1/+1
* Document the new GVN number table structure.Owen Anderson2010-11-191-0/+12
* Operand namesJim Grosbach2010-11-191-4/+4
* trailing whitespaceJim Grosbach2010-11-191-16/+16
* Don't need to save piecemeal now.Eric Christopher2010-11-191-4/+2
* Update comment.Eric Christopher2010-11-191-3/+2
* Add encodings for some of the thumb ADD instructions. Tests will come once theBill Wendling2010-11-191-16/+44
* Update comment.Eric Christopher2010-11-191-1/+1
* Clarify operand names.Jim Grosbach2010-11-191-3/+3
* Refactor address mode handling into a single struct (ala x86), thisEric Christopher2010-11-191-50/+72
* Fix encoding for ARM MLS instruction.Jim Grosbach2010-11-191-3/+5
* When folding addressing modes in CodeGenPrepare, attempt to look through PHI ...Owen Anderson2010-11-191-3/+29
* Add ARM encoding information for STRD.Jim Grosbach2010-11-192-17/+4
* Shuffle things around a bit to keep like things together. Tidy up formatting.Jim Grosbach2010-11-191-20/+20
* Revert accidental commit.Bill Wendling2010-11-191-3/+4
* Change long binary encodings to use hex instead. It's more readable. AlsoBill Wendling2010-11-191-17/+20
* Factor out operand encoding bits for ARM addressing mode 2 store instructions.Jim Grosbach2010-11-192-58/+33
* Delete another dead class.Jim Grosbach2010-11-191-12/+0
* whitespace tweak.Jim Grosbach2010-11-191-1/+0
* Fix a use after free. Patch by Frits van Bommel.Rafael Espindola2010-11-191-6/+9
* Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.Jim Grosbach2010-11-192-52/+6
* Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.Jim Grosbach2010-11-192-7/+7
* Add ARM binary encoding information for the rest of the indexed loads.Jim Grosbach2010-11-192-175/+63
* Make isScalarToVector to return false if the node is a scalar. This will preventMon P Wang2010-11-191-0/+2
* Added support for the Mach-O .symbol_resolver directive. rdar://8673046Kevin Enderby2010-11-196-0/+10
* Remove dead code.Jim Grosbach2010-11-191-10/+0
* ARM LDRD binary encoding.Jim Grosbach2010-11-192-22/+12
* Remove hard tabs.Jim Grosbach2010-11-191-2/+2
* Remove trailing whitespace.Jim Grosbach2010-11-191-62/+62
* Avoid release build warnings.Benjamin Kramer2010-11-192-4/+4
* Fix decoding ambiguities of stdrex and ldrex.Owen Anderson2010-11-191-4/+0
* Silence warning about an uninitialized variable.Benjamin Kramer2010-11-191-1/+1
* Remove threading of Xor over selects and phis, with an explanationDuncan Sands2010-11-191-13/+18
* Add a MCLineSectionOrder vector so that we produce the line tables in aRafael Espindola2010-11-191-10/+15
* These instructions are thumb2 only.Evan Cheng2010-11-191-1/+1
* Fix an obvious oversight.Evan Cheng2010-11-191-2/+2
* Don't attempt trivial coalescing for sub-register copies.Jakob Stoklund Olesen2010-11-191-0/+4
* Add an assert.Rafael Espindola2010-11-191-1/+3
* Add ADT/IntervalMap.Jakob Stoklund Olesen2010-11-192-0/+61
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