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* DISubrange supports unsigned lower/upper array bounds, so let's not fake it ↵Devang Patel2011-11-171-4/+4
| | | | | | in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144937 91177308-0d34-0410-b5e6-96231b3b80d8
* quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at ↵Kostya Serebryany2011-11-171-3/+3
| | | | | | r144933. For some reason this compiles on linux git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144936 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an overly general check in SimplifyIndvar to handle useless phi cycles.Andrew Trick2011-11-171-2/+2
| | | | | | | | | | | | | | | The right way to check for a binary operation is cast<BinaryOperator>. The original check: cast<Instruction> && numOperands() == 2 would match phi "instructions", leading to an infinite loop in extreme corner case: a useless phi with operands [self, constant] that prior optimization passes failed to remove, being used in the loop by another useless phi, in turn being used by an lshr or udiv. Fixes PR11350: runaway iteration assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144935 91177308-0d34-0410-b5e6-96231b3b80d8
* fall back to explicit list of allowed linkages when instrumenting globals in ↵Kostya Serebryany2011-11-171-2/+5
| | | | | | asan; add a test check that asan does not touch linkonce_odr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144933 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TODO comment.Chad Rosier2011-11-171-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144920 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix SSE/AVX integer comparison patterns to understand that all integer ↵Craig Topper2011-11-171-24/+42
| | | | | | vector loads are promoted to i64 vector loads so patterns need a bitconvert. Also slightly simplify the AVX2 variable shift patterns by using the predefined bitconvert pattern fragments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144896 91177308-0d34-0410-b5e6-96231b3b80d8
* Dead code.Chad Rosier2011-11-171-14/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144888 91177308-0d34-0410-b5e6-96231b3b80d8
* When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier2011-11-171-11/+35
| | | | | | | | | | | | | | | ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs being: (1) If we can't materialize the large constant then we'll cause fast-isel to bail. (2) Too large of an offset can't be directly encoded in the ADD resulting in a MOV+ADD. Generally not a bad thing because otherwise we would have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix for that. (3) Conversely, too low of a threshold we'll miss opportunities to coalesce ADDs. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove seemingly unnecessary duplicate VROUND definitions.Craig Topper2011-11-171-80/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144885 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for custom names for library functions in TargetLibraryInfo. ↵Eli Friedman2011-11-173-13/+50
| | | | | | | | | | | | Add a custom name for fwrite and fputs on x86-32 OSX. Make SimplifyLibCalls honor the custom names for fwrite and fputs. Fixes <rdar://problem/9815881>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144876 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't unconditionally set the kill flag.Chad Rosier2011-11-171-1/+1
| | | | | | | rdar://10456186 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144872 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on vzeroupper insertion on call boundaries for AVX; it works as far as ↵Eli Friedman2011-11-171-1/+1
| | | | | | I know, and I'd like to see wider testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure to replace the chain properly when DAGCombining a ↵Eli Friedman2011-11-161-4/+17
| | | | | | LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863 91177308-0d34-0410-b5e6-96231b3b80d8
* Object/COFF: Support common symbols.Michael J. Spencer2011-11-161-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144861 91177308-0d34-0410-b5e6-96231b3b80d8
* Generalize the fixup info for ARM mode.Jim Grosbach2011-11-161-2/+2
| | | | | | | We don't (yet) have the granularity in the fixups to be specific about which bitranges are affected. That's a future cleanup, but we're not there yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower 64-bit constant pool node.Akira Hatanaka2011-11-161-8/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower 64-bit block address.Akira Hatanaka2011-11-161-9/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix encoding of NOP used for padding in ARM mode .align.Jim Grosbach2011-11-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144842 91177308-0d34-0410-b5e6-96231b3b80d8
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-162-7/+24
| | | | | | | nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144841 91177308-0d34-0410-b5e6-96231b3b80d8
* 64-bit jump register instruction.Akira Hatanaka2011-11-162-6/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144840 91177308-0d34-0410-b5e6-96231b3b80d8
* Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng2011-11-161-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing for shifted register operands for MOV instruction.Jim Grosbach2011-11-161-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144837 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up debug printing of ARM shifted operands.Jim Grosbach2011-11-161-9/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fast-isel stats to determine who's doing all the work, the Chad Rosier2011-11-161-0/+7
| | | | | | target-independent selector or the target-specific selector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144833 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the stats collection for fast-isel. The failed count was only accountingChad Rosier2011-11-161-5/+18
| | | | | | | | | for a single miss and not all predecessor instructions that get selected by the selection DAG instruction selector. This is still not exact (e.g., over states misses when folded/dead instructions are present), but it is a step in the right direction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144832 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.Jim Grosbach2011-11-161-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144814 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing for RRX mnemonic.Jim Grosbach2011-11-162-1/+16
| | | | | | rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144812 91177308-0d34-0410-b5e6-96231b3b80d8
* Added missing comment about new custom lowering of DEC64Pete Cooper2011-11-161-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144811 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng2011-11-161-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144806 91177308-0d34-0410-b5e6-96231b3b80d8
* Check to make sure we can select the instruction before trying to put theChad Rosier2011-11-161-6/+6
| | | | | | operands into a register. Otherwise, we may materialize dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable the assertion again. Looks like fastisel is still generating bad ↵Evan Cheng2011-11-161-1/+2
| | | | | | kill markers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144804 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM mode aliases for bitwise instructions w/ register operands.Jim Grosbach2011-11-162-0/+38
| | | | | | rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144803 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.Bob Wilson2011-11-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144798 91177308-0d34-0410-b5e6-96231b3b80d8
* lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp ↵NAKAMURA Takumi2011-11-161-2/+2
| | | | | | also on MSC15(aka VS9). Seems miscompiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144794 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-1640-253/+277
| | | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
* Record landing pads with a SmallSetVector to avoid multiple entries.Bob Wilson2011-11-161-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There may be many invokes that share one landing pad, and the previous code would record the landing pad once for each invoke. Besides the wasted effort, a pair of volatile loads gets inserted every time the landing pad is processed. The rest of the code can get optimized away when a landing pad is processed repeatedly, but the volatile loads remain, resulting in code like: LBB35_18: Ltmp483: ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r2, [r7, #-72] ldr r2, [r7, #-68] ldr r4, [r7, #-72] ldr r2, [r7, #-68] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144787 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the execution domain on a bunch of SSE/AVX instructions.Craig Topper2011-11-161-91/+157
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144784 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/10444602>Bob Wilson2011-11-161-3/+21
| | | | | | | This same basic code was in the older version of the SjLj exception handling, but it was removed in the recent revisions to that code. It needs to be there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144782 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>Bob Wilson2011-11-164-74/+4
| | | | | | | | | | | | | | | | | The EmitBasePointerRecalculation function has 2 problems, one minor and one fatal. The minor problem is that it inserts the code at the setjmp instead of in the dispatch block. The fatal problem is that at the point where this code runs, we don't know whether there will be a base pointer, so the entire function is a no-op. The base pointer recalculation needs to be handled as it was before, by inserting a pseudo instruction that gets expanded late. Most of the support for the old approach is still here, but it no longer has any connection to the eh_sjlj_dispatchsetup intrinsic. Clean up the parts related to the intrinsic and just generate the pseudo instruction directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144781 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove code to enable execution dependency fix pass on VR256. VR128 is ↵Craig Topper2011-11-161-9/+3
| | | | | | sufficient after r144636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.Evan Cheng2011-11-161-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144776 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it whenNick Lewycky2011-11-161-30/+20
| | | | | | | looking at the size of the pointee. Fixes PR11390! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144773 91177308-0d34-0410-b5e6-96231b3b80d8
* If the 2addr instruction has other kills, don't move it below any other uses ↵Evan Cheng2011-11-161-2/+7
| | | | | | since we don't want to extend other live ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144772 91177308-0d34-0410-b5e6-96231b3b80d8
* RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE ↵Evan Cheng2011-11-161-1/+1
| | | | | | instructions. rdar://10451185 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144771 91177308-0d34-0410-b5e6-96231b3b80d8
* Process all uses first before defs to accurately capture register liveness. ↵Evan Cheng2011-11-161-7/+13
| | | | | | rdar://10449480 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144770 91177308-0d34-0410-b5e6-96231b3b80d8
* CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman2011-11-161-22/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a couple asserts so it will be easier to debug if we accidentally pass ↵Eli Friedman2011-11-161-0/+4
| | | | | | indexed loads/stores to the legalizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144767 91177308-0d34-0410-b5e6-96231b3b80d8
* AddressSanitizer, first commit (compiler module only)Kostya Serebryany2011-11-163-0/+967
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144758 91177308-0d34-0410-b5e6-96231b3b80d8
* test commit to verify that commit access works (added blank line)Kostya Serebryany2011-11-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144748 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename MVT::untyped to MVT::Untyped to match similar nomenclature.Owen Anderson2011-11-163-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747 91177308-0d34-0410-b5e6-96231b3b80d8
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