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* X86: Don't fold spills into SSE operations if the stack is unaligned.Benjamin Kramer2013-10-061-0/+4
| | | | | | | Regalloc can emit unaligned spills nowadays, but we can't fold the spills into SSE ops if we can't guarantee alignment. PR12250. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192064 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: added scalar convert instructions and intrinsics.Elena Demikhovsky2013-10-063-13/+189
| | | | | | | Fixed load folding in VPERM2I instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192063 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Do not emit nop after fcmp* instruction with V9.Venkatraman Govindaraju2013-10-062-7/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: fixed shuffle loweringElena Demikhovsky2013-10-062-1/+15
| | | | | | | in case of BLEND and added VSHUFPS patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192055 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.Venkatraman Govindaraju2013-10-062-7/+55
| | | | | | | | This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192054 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.Venkatraman Govindaraju2013-10-061-4/+4
| | | | | | | addx/subx does not modify conditional codes whereas addxcc/subxx does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192053 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TBM instructions to loading folding tables.Craig Topper2013-10-051-1/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192046 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename this feature to "cx16" to match gcc's flag name. Apparently these stringsNick Lewycky2013-10-051-1/+1
| | | | | | | are directly tied to the flag names in clang with no remapping in between? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192044 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit a better error when running out of registers on inline asm.Benjamin Kramer2013-10-052-4/+6
| | | | | | | | | The most likely case where this error happens is when the user specifies too many register operands. Don't make it look like an internal LLVM bug when we can see that the error is coming from an inline asm instruction. For other instructions we keep the "ran out of registers" error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192041 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove underscores from TBM instruction names for consistency with other ↵Craig Topper2013-10-051-24/+24
| | | | | | instruction naming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192040 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns ↵Craig Topper2013-10-051-39/+20
| | | | | | are sufficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192039 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into ↵Craig Topper2013-10-051-0/+6
| | | | | | (sub -2, x). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192037 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some really nasty uses of hasRawTextSupport.Rafael Espindola2013-10-0519-231/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When MC was first added, targets could use hasRawTextSupport to keep features working before they were added to the MC interface. The design goal of MC is to provide an uniform api for printing assembly and object files. Short of relaxations and other corner cases, a object file is just another representation of the assembly. It was never the intention that targets would keep doing things like if (hasRawTextSupport()) Set flags in one way. else Set flags in another way. When they do that they create two code paths and the object file is no longer just another representation of the assembly. This also then requires testing with llc -filetype=obj, which is extremelly brittle. This patch removes some of these hacks by replacing them with smaller ones. The ARM flag setting is trivial, so I just moved it to the constructor. For Mips, the patch adds two temporary hack directives that allow the assembly to represent the same things as the object file was already able to. The hope is that the mips developers will replace the hack directives with the same ones that gas uses and drop the -print-hack-directives flag. I will also try to implement a target streamer interface, so that we can move this out of the common code. In summary, for any new work, two rules of the thumb are * Don't use "llc -filetype=obj" in tests. * Don't add calls to hasRawTextSupport. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192035 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction set AdvSIMD (Across).Jiangning Liu2013-10-052-0/+144
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
* Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences ↵Craig Topper2013-10-051-0/+27
| | | | | | of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Use correct alignment while loading/storing fp128 values.Venkatraman Govindaraju2013-10-051-4/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192023 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding multiple GOT handling to RuntimeDyldELFAndrew Kaylor2013-10-052-59/+81
| | | | | | | | Patch by Ashok Thirumurthi git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192020 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: In DIBuilder, the derived-from field of a DW_TAG_pointer_typeManman Ren2013-10-055-87/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | is updated to use DITypeRef. Move isUnsignedDIType and getOriginalTypeSize from DebugInfo.h to be static helper functions in DwarfCompileUnit. We already have a static helper function "isTypeSigned" in DwarfCompileUnit, and a pointer to DwarfDebug is added to resolve the derived-from field. All three functions need to go across link for derived-from fields, so we need to get hold of a type identifier map. A pointer to DwarfDebug is also added to DbgVariable in order to resolve the derived-from field. Debug info verifier is updated to check a derived-from field is a TypeRef. Verifier will not go across link for derived-from fields, in debug info finder, we go across the link to add derived-from fields to types. Function getDICompositeType is only used by dragonegg and since dragonegg does not generate identifier for types, we use an empty map to resolve the derived-from field. When printing a derived-from field, we use DITypeRef::getName to either return the type identifier or getName of the DIType. A paired commit at clang is required due to changes to DIBuilder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192018 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorganize some member variables and update a comment.Eric Christopher2013-10-051-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192017 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix one comment and update another. Slightly reformat.Eric Christopher2013-10-052-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192016 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP ↵Venkatraman Govindaraju2013-10-051-1/+1
| | | | | | with fp128 operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192015 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a resolve method on CompileUnit that forwards to DwarfDebug.Eric Christopher2013-10-052-8/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192014 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Don't crash in SelectionDAGISel when a vreg that is beingAdrian Prantl2013-10-051-3/+7
| | | | | | | | pointed to by a dbg_value belonging to a function argument is eliminated during instruction selection. rdar://problem/15094721. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192011 91177308-0d34-0410-b5e6-96231b3b80d8
* Make a bunch of CompileUnit member functions private.Eric Christopher2013-10-052-36/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192009 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Correct the floating point conditional code mapping in ↵Venkatraman Govindaraju2013-10-041-8/+8
| | | | | | GetOppositeBranchCondition(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192006 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor formatting/comment rewording/etc.David Blaikie2013-10-041-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192005 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove odd use of this.Eric Christopher2013-10-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192004 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat some odd formattings.Eric Christopher2013-10-041-32/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192003 91177308-0d34-0410-b5e6-96231b3b80d8
* Tighten up some type arguments to functions. Where we expect aEric Christopher2013-10-042-6/+6
| | | | | | scope, pass a scope. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192002 91177308-0d34-0410-b5e6-96231b3b80d8
* UpdatePHINodes in BasicBlockUtils should not crash on duplicate predecessorsHal Finkel2013-10-041-2/+6
| | | | | | | | | | | UpdatePHINodes has an optimization to reuse an existing PHI node, where it first deletes all of its entries and then replaces them. Unfortunately, in the case where we had duplicate predecessors (which are allowed so long as the associated PHI entries have the same value), the loop removing the existing PHI entries from the to-be-reused PHI would assert (if that PHI was not the one which had the duplicates). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192001 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some dead code.David Blaikie2013-10-042-7/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192000 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify setting of DIE tag for type DIEs by setting it in one* place.David Blaikie2013-10-041-16/+8
| | | | | | * two actually due to some weird template thing... investigating that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191998 91177308-0d34-0410-b5e6-96231b3b80d8
* Prune includes.Eric Christopher2013-10-041-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191994 91177308-0d34-0410-b5e6-96231b3b80d8
* forgot to remove this file as wellJack Carter2013-10-041-53/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191993 91177308-0d34-0410-b5e6-96231b3b80d8
* reverting per requestJack Carter2013-10-045-45/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191992 91177308-0d34-0410-b5e6-96231b3b80d8
* Use addFlag to add the enum class attribute.Eric Christopher2013-10-041-1/+1
| | | | | | This has the side effect of using DW_FORM_flag_present on dwarf4 and above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191991 91177308-0d34-0410-b5e6-96231b3b80d8
* Use Die->addValue and DIEIntegerOne directly when we want to addEric Christopher2013-10-041-3/+2
| | | | | | a flag. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191990 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix DAGCombiner::visitFP_EXTEND to ignore indexed loadsHal Finkel2013-10-041-1/+1
| | | | | | | | | | | | | | | | DAGCombiner::visitFP_EXTEND will apply the following transformation: fold (fpext (load x)) -> (fpext (fptrunc (extload x))) but the implementation does not handle indexed loads (pre/post inc.), but did not specifically ignore them either (unlike for extending loads, which it already ignored), causing an assert when the transformation was applied to an indexed load. This is the minimal fix for correctness (causing the transformation to be skipped for indexed loads). Unfortunately, I don't have an in-tree test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191989 91177308-0d34-0410-b5e6-96231b3b80d8
* Support tblockaddr for static compilation in Mips16.Reed Kotler2013-10-041-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191986 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC][AsmParser] Hook for post assembly file processingJack Carter2013-10-046-6/+100
| | | | | | | | | | | | | | | | | | | | | | This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file directive processing. Mips assembly requires processing inline directives that directly and indirectly affect the output ELF header flags. This patch handles one ".abicalls". To process these directives we are following the model the code generator uses by storing state in a container as we go through processing and when we detect the end of input file processing, AsmParser is notified and we update the ELF header flags through a MipsELFStreamer method with a call from MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer). This patch will allow other targets the same functionality. Jack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191982 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasingAkira Hatanaka2013-10-041-0/+5
| | | | | | | instructions in delay slots along with the original branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191978 91177308-0d34-0410-b5e6-96231b3b80d8
* SLPVectorizer: Sort inputs to commutative binary operationsArnold Schwaighofer2013-10-041-4/+123
| | | | | | | | | | | | | | | | | | | | | | | Sort the operands of the other entries in the current vectorization root according to the first entry's operands opcodes. %conv0 = uitofp ... %load0 = load float ... = fmul %conv0, %load0 = fmul %load0, %conv1 = fmul %load0, %conv2 Make sure that we recursively vectorize <%conv0, %conv1, %conv2> and <%load0, %load0, %load0>. This makes it more likely to obtain vectorizable trees. We have to be careful when we sort that we don't destroy 'good' existing ordering implied by source order. radar://15080067 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191977 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r176882 as it needs to be implemented in a differentEric Christopher2013-10-046-60/+5
| | | | | | way for all platforms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191975 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r191792 as it is causing some LTO debug failuresEric Christopher2013-10-047-215/+103
| | | | | | | on platforms with relocations in debug info and also temporarily revert r191800 due to conflicts with the revert of r191792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191967 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix commentMatthias Braun2013-10-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191966 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix indentationMatthias Braun2013-10-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191965 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typoMatthias Braun2013-10-042-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191964 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: optimizeSelect has to consider the previous register classMatthias Braun2013-10-041-4/+9
| | | | | | | | optimizeSelect folds (predicated) copy instructions, it must not ignore the original register class of the operand when replacing the register with the copies dest register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191963 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: do not add a regmask for TAILJUMPsMatthias Braun2013-10-041-16/+18
| | | | | | | | | The jump doesn't really kill the registers, the following call does but we never get back anyway. This avoids some verify-machineinstrs problems when TAILJUMPs are if-converted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191962 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: preserve undef flag in pseudo instruction expandersMatthias Braun2013-10-041-19/+14
| | | | | | | Copy over the whole register machine operand instead of creating a new one with an incomplete set of flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191961 91177308-0d34-0410-b5e6-96231b3b80d8
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