aboutsummaryrefslogtreecommitdiffstats
path: root/lib
Commit message (Expand)AuthorAgeFilesLines
* Implement order-preserving option forwarding.Mikhail Glushenkov2010-02-231-1/+13
* Correct option forwarding: initial implementation.Mikhail Glushenkov2010-02-231-0/+9
* New experimental/undocumented feature: 'works_on_empty'.Mikhail Glushenkov2010-02-232-5/+1
* disable two patterns that are using non-sensical result pattern types.Chris Lattner2010-02-231-4/+4
* remove a confused pattern that is trying to match an addressChris Lattner2010-02-231-7/+0
* remove a bunch of dead named arguments in input patterns,Chris Lattner2010-02-235-46/+46
* fix a type mismatch in this pattern, where we were using an i64 imm in a Chris Lattner2010-02-231-1/+7
* Update memdep when load PRE inserts a new load, and add some debug output.Bob Wilson2010-02-231-0/+2
* reapply my cellspu changes with a fix to not break the old isel.Chris Lattner2010-02-231-42/+73
* Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.Dan Gohman2010-02-231-71/+42
* X86InstrInfoSSE.td declares PINSRW as having type v8i16,Chris Lattner2010-02-233-7/+19
* Added versions of VCGE, VCGT, VCLE, and VCLT NEON instructions which compare toJohnny Chen2010-02-231-9/+25
* fix hte last cellspu failure.Chris Lattner2010-02-231-11/+12
* hack around more crimes in instruction selection.Chris Lattner2010-02-231-16/+26
* the cell backend is making all sorts of unsafe and incorrect assumptions Chris Lattner2010-02-231-26/+44
* Added VCEQ (immediate #0) NEON instruction for disassembly only.Johnny Chen2010-02-231-0/+41
* Dead code eliminationJakob Stoklund Olesen2010-02-232-14/+0
* Fix viewCFG on Linux.Jeffrey Yasskin2010-02-231-1/+1
* Instcombine constant folding can normalize gep with negative index to index w...Evan Cheng2010-02-221-4/+9
* Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach2010-02-225-5/+23
* Clean up a bit and fix for when SPAdj != 0Jim Grosbach2010-02-221-3/+2
* The predicate index isn't fixed, so scan for it to make sure we get the properJim Grosbach2010-02-221-2/+3
* Canonicalize ConstantInts to the right operand of commutativeDan Gohman2010-02-222-2/+6
* remove dupes now.Chris Lattner2010-02-221-2/+0
* move #includes earlier.Chris Lattner2010-02-222-2/+3
* MC/Mach-O: Remove non-sensical comment, and add a missing AddValueSymbols call.Daniel Dunbar2010-02-221-3/+1
* Minor formatting cleanup.Dan Gohman2010-02-221-2/+1
* Use Instruction::isCommutative instead of duplicating it.Dan Gohman2010-02-221-24/+1
* Added SEL, SXTB16, SXTAB16, UXTAB16, SMMULR, SMMLAR, SMMLSR, SMUAD, and SMUSD,Johnny Chen2010-02-221-5/+83
* Erase deleted instructions from GVN's ValueTable. This fixes assertionBob Wilson2010-02-221-0/+7
* Added a bunch of instructions for disassembly only:Johnny Chen2010-02-221-19/+145
* Mark the return address stack slot as mutable when moving the return addressArnold Schwaighofer2010-02-221-2/+2
* Remove unused variables and parameters.Dan Gohman2010-02-224-50/+28
* Fix various doxygen warnings.Dan Gohman2010-02-222-4/+2
* Fix a typo in a comment.Dan Gohman2010-02-221-1/+1
* Constant-fold certain comparisons with infinity and negative infinity.Dan Gohman2010-02-221-0/+26
* Remove the logic for reasoning about NaNs from the code that formsDan Gohman2010-02-221-88/+11
* When emitting an instruction which depends on both a post-incrementedDan Gohman2010-02-221-2/+4
* This cast<Instruction> is unnecessary.Dan Gohman2010-02-221-1/+1
* fix an incorrect VT: eflags is always i32. The bug was causing us toChris Lattner2010-02-221-1/+1
* MC/X86: Add stub AsmBackend.Daniel Dunbar2010-02-215-3/+50
* MC: Sketch registry support for target specific assembler backends.Daniel Dunbar2010-02-211-0/+19
* It turned out that we failed to emit proper symbol stubs on non-x86/darwin fo...Anton Korobeynikov2010-02-214-84/+30
* Remove a bunch of duplicated code, where there was one version taking a std::...Duncan Sands2010-02-211-177/+15
* Enable assertion to detect cyclic valno references.Jakob Stoklund Olesen2010-02-211-1/+1
* IT turns out that during jumpless setcc lowering eq and ne were swapped.Anton Korobeynikov2010-02-211-8/+5
* fix and un-xfail X86/vec_ss_load_fold.llChris Lattner2010-02-211-3/+2
* Undo r96654. The printing of ARM shift instructions in canonical forms can beJohnny Chen2010-02-211-24/+28
* rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewriteChris Lattner2010-02-211-18/+28
* Eliminate some uses of immAllOnes, just use -1, it doesChris Lattner2010-02-212-4/+4