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* Use proper section suffix for COFF weak symbolsNico Rieck2013-07-292-16/+19
* Proper va_arg/va_copy lowering on win64Nico Rieck2013-07-291-1/+3
* Add support for the 's' operation to llvm-ar.Rafael Espindola2013-07-291-2/+6
* MC: Support larger COFF string tablesNico Rieck2013-07-291-12/+15
* Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.Benjamin Kramer2013-07-291-1/+3
* Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patc...Silviu Baranga2013-07-294-4/+6
* test commitRobert Lytton2013-07-291-0/+1
* Teach the AllocaPromoter which is wrapped around the SSAUpdaterChandler Carruth2013-07-291-15/+51
* Don't vectorize when the attribute NoImplicitFloat is used.Nadav Rotem2013-07-291-0/+5
* Fix -Wdocumentation warnings.Rafael Espindola2013-07-281-4/+4
* Update comments for SSAUpdater to use the modern doxygen commentChandler Carruth2013-07-281-41/+3
* Temporarily revert r187323 until I update SSAUpdater to match mem2reg.Chandler Carruth2013-07-281-81/+12
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-2813-22/+441
* Now that mem2reg understands how to cope with a slightly wider set ofChandler Carruth2013-07-281-12/+81
* Thread DataLayout through the callers and into mem2reg. This will beChandler Carruth2013-07-284-12/+20
* [PowerPC] Add comment explaining preprocessor directive.Bill Schmidt2013-07-281-0/+2
* Revert 187318Bill Schmidt2013-07-281-1/+1
* [PowerPC] Remove unnecessary preprocessor checking.Bill Schmidt2013-07-281-1/+1
* Update the commentNadav Rotem2013-07-271-0/+1
* [APFloat] Make all arithmetic operations with NaN produce positive NaNs.Michael Gottesman2013-07-271-7/+10
* [APFloat] Move setting fcNormal in zeroSignificand() to calling code.Michael Gottesman2013-07-271-2/+4
* Minor code simplification suggested by DuncanMatt Arsenault2013-07-271-2/+1
* DwarfDebug: MD5 is always little endian, bswap on big endian platforms.Benjamin Kramer2013-07-271-2/+3
* Create a constant pool symbol for the GOT in the ARMCGBR the same way weChandler Carruth2013-07-271-7/+8
* Fix yet another memory leak found by the vg-leak bot. Folks (includingChandler Carruth2013-07-271-2/+6
* Fix a memory leak in the debug emission by simply not allocating memory.Chandler Carruth2013-07-271-2/+2
* Fix a memory leak in the hexagon scheduler. We call initialize here moreChandler Carruth2013-07-271-0/+2
* Don't use all the #ifdefs to hide the stats counters and instead rely onChandler Carruth2013-07-271-18/+0
* Merge the removal of dead instructions and lifetime markers with theChandler Carruth2013-07-271-41/+32
* Debug Info Verifier: verify SPs in llvm.dbg.sp.Manman Ren2013-07-271-3/+9
* Also update CMakeLists.txt for r187283.Nick Lewycky2013-07-271-0/+1
* Reimplement isPotentiallyReachable to make nocapture deduction much stronger.Nick Lewycky2013-07-278-119/+236
* SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch cond...Tom Stellard2013-07-2711-36/+614
* SLP Vectorier: Don't vectorize really short chains because they are already ...Nadav Rotem2013-07-261-2/+6
* SLP Vectorizer: Disable the vectorization of non power of two chains, such as...Nadav Rotem2013-07-261-16/+0
* Revert "[PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc."Rafael Espindola2013-07-262-5/+5
* Fix variable name.Owen Anderson2013-07-261-2/+2
* When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it isOwen Anderson2013-07-261-1/+13
* [PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc.Bill Schmidt2013-07-262-5/+5
* Use more parens to clarify assert.Eric Christopher2013-07-261-1/+1
* Remove addLetterToHash, no functional change.Eric Christopher2013-07-261-10/+1
* [mips] Implement llvm.trap intrinsic.Akira Hatanaka2013-07-262-0/+7
* [mips] Fix FP conditional move instructions to have explicit FP condition codeAkira Hatanaka2013-07-264-13/+14
* Add missing 'n'.Rafael Espindola2013-07-261-1/+1
* [mips] Fix FP branch instructions to have explicit FP condition code registerAkira Hatanaka2013-07-265-25/+41
* Debug Info Verifier: enable verification of DICompileUnit.Manman Ren2013-07-261-3/+0
* [mips] Increase the number of floating point condition code registers to eight.Akira Hatanaka2013-07-261-3/+5
* [mips] Fix floating point branch, comparison, and conditional move instructionsAkira Hatanaka2013-07-262-4/+4
* [mips] Delete register print method MipsInstPrinter::printCPURegs that is notAkira Hatanaka2013-07-263-11/+5
* [mips] Print instructions "beq", "bne" and "or" using assembler pseudoAkira Hatanaka2013-07-262-1/+57